aboutsummaryrefslogtreecommitdiff
path: root/gcc
diff options
context:
space:
mode:
authorJeff Law <law@gcc.gnu.org>1997-03-18 11:38:59 -0700
committerJeff Law <law@gcc.gnu.org>1997-03-18 11:38:59 -0700
commit2b3600acb4eceda3000312002ec78fecd5a39d30 (patch)
tree97afa754389a4b6eb1eb73901dab73f242a04343 /gcc
parentf57b1ad380462f8b4fd5ce5208b605095f81d50b (diff)
downloadgcc-2b3600acb4eceda3000312002ec78fecd5a39d30.zip
gcc-2b3600acb4eceda3000312002ec78fecd5a39d30.tar.gz
gcc-2b3600acb4eceda3000312002ec78fecd5a39d30.tar.bz2
m68k.c (m68k_last_compare_had_fp_operands): New variable.
* m68k/m68k.c (m68k_last_compare_had_fp_operands): New variable. * m68k/m68k.h (m68k_last_compare_had_fp_operands): Declare it. * m68k/m68k.md (tst*, cmp*): Turn all of these into define_expand/define_insn pairs. Keep track of whether or not the test/compare has fp operands. (seq, sne, sgt, slt, sge, sle): Turn these into define_expand/define_insn pairs. Make the expanders FAIL if TARGET_68060 and the last comparison/test had fp operands. From-SVN: r13731
Diffstat (limited to 'gcc')
-rw-r--r--gcc/config/m68k/m68k.c4
-rw-r--r--gcc/config/m68k/m68k.h1
-rw-r--r--gcc/config/m68k/m68k.md166
3 files changed, 156 insertions, 15 deletions
diff --git a/gcc/config/m68k/m68k.c b/gcc/config/m68k/m68k.c
index 28237e1..d41eb0e 100644
--- a/gcc/config/m68k/m68k.c
+++ b/gcc/config/m68k/m68k.c
@@ -68,6 +68,10 @@ int m68k_align_jumps;
/* Specify power of two alignment used for functions. */
int m68k_align_funcs;
+/* Nonzero if the last compare/test insn had FP operands. The
+ sCC expanders peek at this to determine what to do for the
+ 68060, which has no fsCC instructions. */
+int m68k_last_compare_had_fp_operands;
/* Sometimes certain combinations of command options do not make
sense on a particular target machine. You can define a macro
diff --git a/gcc/config/m68k/m68k.h b/gcc/config/m68k/m68k.h
index fc5a669..918878c 100644
--- a/gcc/config/m68k/m68k.h
+++ b/gcc/config/m68k/m68k.h
@@ -2094,6 +2094,7 @@ extern char *m68k_align_funcs_string;
extern int m68k_align_loops;
extern int m68k_align_jumps;
extern int m68k_align_funcs;
+extern int m68k_last_compare_had_fp_operands;
/*
diff --git a/gcc/config/m68k/m68k.md b/gcc/config/m68k/m68k.md
index 3828d61..64ba094 100644
--- a/gcc/config/m68k/m68k.md
+++ b/gcc/config/m68k/m68k.md
@@ -303,7 +303,15 @@
;; (set (cc0) (const_int foo)) has no mode information. Such insns will
;; be folded while optimizing anyway.
-(define_insn "tstdi"
+(define_expand "tstdi"
+ [(set (cc0)
+ (match_operand:DI 0 "nonimmediate_operand" ""))
+ (clobber (match_scratch:SI 1 ""))
+ (clobber (match_scratch:DI 2 ""))]
+ ""
+ "m68k_last_compare_had_fp_operands = 0;")
+
+(define_insn ""
[(set (cc0)
(match_operand:DI 0 "nonimmediate_operand" "am,d"))
(clobber (match_scratch:SI 1 "=X,d"))
@@ -335,7 +343,13 @@
return \"sub%.l %1,%1\;tst%.l %R0\;subx%.l %1,%0\";
}")
-(define_insn "tstsi"
+(define_expand "tstsi"
+ [(set (cc0)
+ (match_operand:SI 0 "nonimmediate_operand" ""))]
+ ""
+ "m68k_last_compare_had_fp_operands = 0;")
+
+(define_insn ""
[(set (cc0)
(match_operand:SI 0 "nonimmediate_operand" "rm"))]
""
@@ -360,13 +374,25 @@
;; This can't use an address register, because comparisons
;; with address registers as second operand always test the whole word.
-(define_insn "tsthi"
+(define_expand "tsthi"
+ [(set (cc0)
+ (match_operand:HI 0 "nonimmediate_operand" ""))]
+ ""
+ "m68k_last_compare_had_fp_operands = 0;")
+
+(define_insn ""
[(set (cc0)
(match_operand:HI 0 "nonimmediate_operand" "dm"))]
""
"tst%.w %0")
-(define_insn "tstqi"
+(define_expand "tstqi"
+ [(set (cc0)
+ (match_operand:QI 0 "nonimmediate_operand" ""))]
+ ""
+ "m68k_last_compare_had_fp_operands = 0;")
+
+(define_insn ""
[(set (cc0)
(match_operand:QI 0 "nonimmediate_operand" "dm"))]
""
@@ -378,6 +404,7 @@
"TARGET_68881 || TARGET_FPA"
"
{
+ m68k_last_compare_had_fp_operands = 1;
if (TARGET_FPA)
{
emit_insn (gen_tstsf_fpa (operands[0]));
@@ -410,6 +437,7 @@
"TARGET_68881 || TARGET_FPA"
"
{
+ m68k_last_compare_had_fp_operands = 1;
if (TARGET_FPA)
{
emit_insn (gen_tstsf_fpa (operands[0]));
@@ -445,7 +473,7 @@
(match_operand:DI 1 "general_operand" "")))
(clobber (match_dup 2))])]
""
- "operands[2] = gen_reg_rtx (DImode);")
+ "m68k_last_compare_had_fp_operands = 0; operands[2] = gen_reg_rtx (DImode);")
(define_insn ""
[(set (cc0)
@@ -473,6 +501,7 @@
""
"
{
+ m68k_last_compare_had_fp_operands = 0;
if (flag_pic && symbolic_operand (operands[1], SImode))
{
/* The source is an address which requires PIC relocation.
@@ -538,7 +567,14 @@
#endif
}")
-(define_insn "cmphi"
+(define_expand "cmphi"
+ [(set (cc0)
+ (compare (match_operand:HI 0 "nonimmediate_operand" "")
+ (match_operand:HI 1 "general_operand" "")))]
+ "!TARGET_5200"
+ "m68k_last_compare_had_fp_operands = 0;")
+
+(define_insn ""
[(set (cc0)
(compare (match_operand:HI 0 "nonimmediate_operand" "rnm,d,n,m,>")
(match_operand:HI 1 "general_operand" "d,rnm,m,n,>")))]
@@ -567,7 +603,14 @@
#endif
}")
-(define_insn "cmpqi"
+(define_expand "cmpqi"
+ [(set (cc0)
+ (compare (match_operand:QI 0 "nonimmediate_operand" "")
+ (match_operand:QI 1 "general_operand" "")))]
+ "!TARGET_5200"
+ "m68k_last_compare_had_fp_operands = 0;")
+
+(define_insn ""
[(set (cc0)
(compare (match_operand:QI 0 "nonimmediate_operand" "dn,md,>")
(match_operand:QI 1 "general_operand" "dm,nd,>")))]
@@ -603,6 +646,7 @@
"TARGET_68881 || TARGET_FPA"
"
{
+ m68k_last_compare_had_fp_operands = 1;
if (TARGET_FPA)
{
emit_insn (gen_cmpdf_fpa (operands[0], operands[1]));
@@ -656,6 +700,7 @@
"TARGET_68881 || TARGET_FPA"
"
{
+ m68k_last_compare_had_fp_operands = 1;
if (TARGET_FPA)
{
emit_insn (gen_cmpsf_fpa (operands[0], operands[1]));
@@ -5332,7 +5377,20 @@
return output_scc_di (operands[1], operands[2], operands[3], operands[0]);
} ")
-(define_insn "seq"
+(define_expand "seq"
+ [(set (match_operand:QI 0 "general_operand" "")
+ (eq:QI (cc0) (const_int 0)))]
+ ""
+ "
+{
+ if (TARGET_68060 && m68k_last_compare_had_fp_operands)
+ {
+ m68k_last_compare_had_fp_operands = 0;
+ FAIL;
+ }
+}")
+
+(define_insn ""
[(set (match_operand:QI 0 "general_operand" "=dm")
(eq:QI (cc0) (const_int 0)))]
""
@@ -5341,7 +5399,20 @@
OUTPUT_JUMP (\"seq %0\", \"fseq %0\", \"seq %0\");
")
-(define_insn "sne"
+(define_expand "sne"
+ [(set (match_operand:QI 0 "general_operand" "")
+ (ne:QI (cc0) (const_int 0)))]
+ ""
+ "
+{
+ if (TARGET_68060 && m68k_last_compare_had_fp_operands)
+ {
+ m68k_last_compare_had_fp_operands = 0;
+ FAIL;
+ }
+}")
+
+(define_insn ""
[(set (match_operand:QI 0 "general_operand" "=dm")
(ne:QI (cc0) (const_int 0)))]
""
@@ -5350,7 +5421,20 @@
OUTPUT_JUMP (\"sne %0\", \"fsne %0\", \"sne %0\");
")
-(define_insn "sgt"
+(define_expand "sgt"
+ [(set (match_operand:QI 0 "general_operand" "")
+ (gt:QI (cc0) (const_int 0)))]
+ ""
+ "
+{
+ if (TARGET_68060 && m68k_last_compare_had_fp_operands)
+ {
+ m68k_last_compare_had_fp_operands = 0;
+ FAIL;
+ }
+}")
+
+(define_insn ""
[(set (match_operand:QI 0 "general_operand" "=dm")
(gt:QI (cc0) (const_int 0)))]
""
@@ -5366,7 +5450,20 @@
"* cc_status = cc_prev_status;
return \"shi %0\"; ")
-(define_insn "slt"
+(define_expand "slt"
+ [(set (match_operand:QI 0 "general_operand" "")
+ (lt:QI (cc0) (const_int 0)))]
+ ""
+ "
+{
+ if (TARGET_68060 && m68k_last_compare_had_fp_operands)
+ {
+ m68k_last_compare_had_fp_operands = 0;
+ FAIL;
+ }
+}")
+
+(define_insn ""
[(set (match_operand:QI 0 "general_operand" "=dm")
(lt:QI (cc0) (const_int 0)))]
""
@@ -5380,7 +5477,20 @@
"* cc_status = cc_prev_status;
return \"scs %0\"; ")
-(define_insn "sge"
+(define_expand "sge"
+ [(set (match_operand:QI 0 "general_operand" "")
+ (ge:QI (cc0) (const_int 0)))]
+ ""
+ "
+{
+ if (TARGET_68060 && m68k_last_compare_had_fp_operands)
+ {
+ m68k_last_compare_had_fp_operands = 0;
+ FAIL;
+ }
+}")
+
+(define_insn ""
[(set (match_operand:QI 0 "general_operand" "=dm")
(ge:QI (cc0) (const_int 0)))]
""
@@ -5394,7 +5504,20 @@
"* cc_status = cc_prev_status;
return \"scc %0\"; ")
-(define_insn "sle"
+(define_expand "sle"
+ [(set (match_operand:QI 0 "general_operand" "")
+ (le:QI (cc0) (const_int 0)))]
+ ""
+ "
+{
+ if (TARGET_68060 && m68k_last_compare_had_fp_operands)
+ {
+ m68k_last_compare_had_fp_operands = 0;
+ FAIL;
+ }
+}")
+
+(define_insn ""
[(set (match_operand:QI 0 "general_operand" "=dm")
(le:QI (cc0) (const_int 0)))]
""
@@ -6844,7 +6967,13 @@
fpsm%.s %x3,%2,%x1,%0
fpsm%.s %x3,%2,%x1,%0")
-(define_insn "tstxf"
+(define_expand "tstxf"
+ [(set (cc0)
+ (match_operand:XF 0 "nonimmediate_operand" ""))]
+ "TARGET_68881"
+ "m68k_last_compare_had_fp_operands = 1;")
+
+(define_insn ""
[(set (cc0)
(match_operand:XF 0 "nonimmediate_operand" "fm"))]
"TARGET_68881"
@@ -6854,7 +6983,14 @@
return \"ftst%.x %0\";
}")
-(define_insn "cmpxf"
+(define_expand "cmpxf"
+ [(set (cc0)
+ (compare (match_operand:XF 0 "nonimmediate_operand" "")
+ (match_operand:XF 1 "nonimmediate_operand" "")))]
+ "TARGET_68881"
+ "m68k_last_compare_had_fp_operands = 1;")
+
+(define_insn ""
[(set (cc0)
(compare (match_operand:XF 0 "nonimmediate_operand" "f,m")
(match_operand:XF 1 "nonimmediate_operand" "fm,f")))]