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| author | Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp> | 2022-05-29 19:57:35 +0900 |
|---|---|---|
| committer | Max Filippov <jcmvbkbc@gmail.com> | 2022-06-09 15:07:59 -0700 |
| commit | 29dc90a580bf45f503ed89eb1dc63b5676db776b (patch) | |
| tree | 7f8a6051eb3d5f2d4b2048eb40555252c89f5a97 /gcc | |
| parent | e44e7face13f38f9b228e2619786ba0add9ef77b (diff) | |
| download | gcc-29dc90a580bf45f503ed89eb1dc63b5676db776b.zip gcc-29dc90a580bf45f503ed89eb1dc63b5676db776b.tar.gz gcc-29dc90a580bf45f503ed89eb1dc63b5676db776b.tar.bz2 | |
xtensa: Add clrsbsi2 insn pattern
> (clrsb:m x)
> Represents the number of redundant leading sign bits in x, represented
> as an integer of mode m, starting at the most significant bit position.
This explanation is just what the NSA instruction (not ever emitted before)
calculates in Xtensa ISA.
gcc/ChangeLog:
* config/xtensa/xtensa.md (clrsbsi2): New insn pattern.
libgcc/ChangeLog:
* config/xtensa/lib1funcs.S (__clrsbsi2): New function.
* config/xtensa/t-xtensa (LIB1ASMFUNCS): Add _clrsbsi2.
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/config/xtensa/xtensa.md | 12 |
1 files changed, 11 insertions, 1 deletions
diff --git a/gcc/config/xtensa/xtensa.md b/gcc/config/xtensa/xtensa.md index 3afc252..8ff6f9a 100644 --- a/gcc/config/xtensa/xtensa.md +++ b/gcc/config/xtensa/xtensa.md @@ -429,7 +429,17 @@ (set_attr "length" "3")]) -;; Count leading/trailing zeros and find first bit. +;; Count redundant leading sign bits and leading/trailing zeros, +;; and find first bit. + +(define_insn "clrsbsi2" + [(set (match_operand:SI 0 "register_operand" "=a") + (clrsb:SI (match_operand:SI 1 "register_operand" "r")))] + "TARGET_NSA" + "nsa\t%0, %1" + [(set_attr "type" "arith") + (set_attr "mode" "SI") + (set_attr "length" "3")]) (define_insn "clzsi2" [(set (match_operand:SI 0 "register_operand" "=a") |