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authorJames Greenhalgh <james.greenhalgh@arm.com>2014-05-16 08:56:54 +0000
committerJames Greenhalgh <jgreenhalgh@gcc.gnu.org>2014-05-16 08:56:54 +0000
commit2961177e7d5bd857c4809e6b4a6c655f0bb963cc (patch)
tree1e78ce2db307a4e018f7af7a154bf513a141d29b /gcc
parentba123b0de58bd9c7dbc2b745a82e7f28c6123af9 (diff)
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[AArch64 costs 8/18] Cost memory accesses using address costs
gcc/ * config/aarch64/aarch64.c (aarch64_rtx_costs): Use address costs when costing loads and stores to memory. Co-Authored-By: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> From-SVN: r210500
Diffstat (limited to 'gcc')
-rw-r--r--gcc/ChangeLog6
-rw-r--r--gcc/config/aarch64/aarch64.c32
2 files changed, 36 insertions, 2 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 908e950..a084ca98 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,4 +1,10 @@
2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
+ Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
+
+ * config/aarch64/aarch64.c (aarch64_rtx_costs): Use address
+ costs when costing loads and stores to memory.
+
+2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
Philip Tomsich <philipp.tomsich@theobroma-systems.com>
* config/aarch64/aarch64.c (aarch64_rtx_costs): Improve costing
diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index 92fbd4d..d0a5e49 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -142,6 +142,7 @@ static bool aarch64_const_vec_all_same_int_p (rtx,
static bool aarch64_vectorize_vec_perm_const_ok (enum machine_mode vmode,
const unsigned char *sel);
+static int aarch64_address_cost (rtx, enum machine_mode, addr_space_t, bool);
/* The processor for which instructions should be scheduled. */
enum aarch64_processor aarch64_tune = cortexa53;
@@ -4870,7 +4871,19 @@ aarch64_rtx_costs (rtx x, int code, int outer ATTRIBUTE_UNUSED,
{
case MEM:
if (speed)
- *cost += extra_cost->ldst.store;
+ {
+ rtx address = XEXP (op0, 0);
+ if (GET_MODE_CLASS (mode) == MODE_INT)
+ *cost += extra_cost->ldst.store;
+ else if (mode == SFmode)
+ *cost += extra_cost->ldst.storef;
+ else if (mode == DFmode)
+ *cost += extra_cost->ldst.stored;
+
+ *cost +=
+ COSTS_N_INSNS (aarch64_address_cost (address, mode,
+ 0, speed));
+ }
*cost += rtx_cost (op1, SET, 1, speed);
return true;
@@ -4983,7 +4996,22 @@ aarch64_rtx_costs (rtx x, int code, int outer ATTRIBUTE_UNUSED,
case MEM:
if (speed)
- *cost += extra_cost->ldst.load;
+ {
+ /* For loads we want the base cost of a load, plus an
+ approximation for the additional cost of the addressing
+ mode. */
+ rtx address = XEXP (x, 0);
+ if (GET_MODE_CLASS (mode) == MODE_INT)
+ *cost += extra_cost->ldst.load;
+ else if (mode == SFmode)
+ *cost += extra_cost->ldst.loadf;
+ else if (mode == DFmode)
+ *cost += extra_cost->ldst.loadd;
+
+ *cost +=
+ COSTS_N_INSNS (aarch64_address_cost (address, mode,
+ 0, speed));
+ }
return true;