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authorRobin Dapp <rdapp@linux.ibm.com>2022-04-01 20:28:05 +0200
committerRobin Dapp <rdapp@linux.ibm.com>2022-04-05 08:43:45 +0200
commit2874772c4b597daa66ace0ef28b401d597307a03 (patch)
treec55c29a0ab6ec114e9b5c0ea86a30398c3be5461 /gcc
parent042f85346674bc4dac1d63fbae8db2fb7e8a0103 (diff)
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testsuite/s390: Adapt test expections.
Some tests expect a convert instruction but nowadays (r12-4475-g247c407c83f001) the conversion is already done at compile time. This results in a literal-pool load. Change the tests accordingly. gcc/testsuite/ChangeLog: * gcc.target/s390/zvector/vec-double-compile.c: Expect vl instead of vc*. * gcc.target/s390/zvector/vec-float-compile.c: Dito. * gcc.target/s390/zvector/vec-signed-compile.c: Dito. * gcc.target/s390/zvector/vec-unsigned-compile.c: Dito.
Diffstat (limited to 'gcc')
-rw-r--r--gcc/testsuite/gcc.target/s390/zvector/vec-double-compile.c8
-rw-r--r--gcc/testsuite/gcc.target/s390/zvector/vec-float-compile.c8
-rw-r--r--gcc/testsuite/gcc.target/s390/zvector/vec-signed-compile.c8
-rw-r--r--gcc/testsuite/gcc.target/s390/zvector/vec-unsigned-compile.c8
4 files changed, 24 insertions, 8 deletions
diff --git a/gcc/testsuite/gcc.target/s390/zvector/vec-double-compile.c b/gcc/testsuite/gcc.target/s390/zvector/vec-double-compile.c
index 0a70b09..3c7805f 100644
--- a/gcc/testsuite/gcc.target/s390/zvector/vec-double-compile.c
+++ b/gcc/testsuite/gcc.target/s390/zvector/vec-double-compile.c
@@ -31,6 +31,10 @@ vcdlgb_mem (vector unsigned long long *a)
return vec_double (*a);
}
+/* The following immediates are being converted and directly stored
+ in the literal pool so no explicit conversion is necessary. */
+/* { dg-final { scan-assembler-times "vl\t%v\[0-9\]+,\.L\[0-9\]+\-\.L\[0-9\]+\\(%r\[0-9\]+\\)" 2 } } */
+
vector double
vcdgb_imm ()
{
@@ -43,5 +47,5 @@ vcdlgb_imm ()
return vec_double ((vector unsigned long long){ 1, 2 });
}
-/* { dg-final { scan-assembler-times "vcdgb\t" 3 } } */
-/* { dg-final { scan-assembler-times "vcdlgb\t" 3 } } */
+/* { dg-final { scan-assembler-times "vcdgb\t" 2 } } */
+/* { dg-final { scan-assembler-times "vcdlgb\t" 2 } } */
diff --git a/gcc/testsuite/gcc.target/s390/zvector/vec-float-compile.c b/gcc/testsuite/gcc.target/s390/zvector/vec-float-compile.c
index a591e23..aeb802d 100644
--- a/gcc/testsuite/gcc.target/s390/zvector/vec-float-compile.c
+++ b/gcc/testsuite/gcc.target/s390/zvector/vec-float-compile.c
@@ -31,6 +31,10 @@ vcelfb_mem (vector unsigned int *a)
return vec_float (*a);
}
+/* The following immediates are being converted and directly stored
+ in the literal pool so no explicit conversion is necessary. */
+/* { dg-final { scan-assembler-times "vl\t%v\[0-9\]+,\.L\[0-9\]+\-\.L\[0-9\]+\\(%r\[0-9\]+\\)" 2 } } */
+
vector float
vcefb_imm ()
{
@@ -43,5 +47,5 @@ vcelfb_imm ()
return vec_float ((vector unsigned int){ 1, 2 });
}
-/* { dg-final { scan-assembler-times "vcefb\t" 3 } } */
-/* { dg-final { scan-assembler-times "vcelfb\t" 3 } } */
+/* { dg-final { scan-assembler-times "vcefb\t" 2 } } */
+/* { dg-final { scan-assembler-times "vcelfb\t" 2 } } */
diff --git a/gcc/testsuite/gcc.target/s390/zvector/vec-signed-compile.c b/gcc/testsuite/gcc.target/s390/zvector/vec-signed-compile.c
index 9814cc5..ca6737e6 100644
--- a/gcc/testsuite/gcc.target/s390/zvector/vec-signed-compile.c
+++ b/gcc/testsuite/gcc.target/s390/zvector/vec-signed-compile.c
@@ -31,6 +31,10 @@ vcgdb_mem (vector double *a)
return vec_signed (*a);
}
+/* The following immediates are being converted and directly stored
+ in the literal pool so no explicit conversion is necessary. */
+/* { dg-final { scan-assembler-times "vl\t%v\[0-9\]+,\.L\[0-9\]+\-\.L\[0-9\]+\\(%r\[0-9\]+\\)" 2 } } */
+
vector signed int
vcfeb_imm ()
{
@@ -43,5 +47,5 @@ vcgdb_imm ()
return vec_signed ((vector double){ 1.0, 2.0 });
}
-/* { dg-final { scan-assembler-times "vcfeb\t" 3 } } */
-/* { dg-final { scan-assembler-times "vcgdb\t" 3 } } */
+/* { dg-final { scan-assembler-times "vcfeb\t" 2 } } */
+/* { dg-final { scan-assembler-times "vcgdb\t" 2 } } */
diff --git a/gcc/testsuite/gcc.target/s390/zvector/vec-unsigned-compile.c b/gcc/testsuite/gcc.target/s390/zvector/vec-unsigned-compile.c
index 1eed284..d87108f 100644
--- a/gcc/testsuite/gcc.target/s390/zvector/vec-unsigned-compile.c
+++ b/gcc/testsuite/gcc.target/s390/zvector/vec-unsigned-compile.c
@@ -31,6 +31,10 @@ vclgdb_mem (vector double *a)
return vec_unsigned (*a);
}
+/* The following immediates are being converted and directly stored
+ in the literal pool so no explicit conversion is necessary. */
+/* { dg-final { scan-assembler-times "vl\t%v\[0-9\]+,\.L\[0-9\]+\-\.L\[0-9\]+\\(%r\[0-9\]+\\)" 2 } } */
+
vector unsigned int
vclfeb_imm ()
{
@@ -43,5 +47,5 @@ vclgdb_imm ()
return vec_unsigned ((vector double){ 1.0, 2.0 });
}
-/* { dg-final { scan-assembler-times "vclfeb\t" 3 } } */
-/* { dg-final { scan-assembler-times "vclgdb\t" 3 } } */
+/* { dg-final { scan-assembler-times "vclfeb\t" 2 } } */
+/* { dg-final { scan-assembler-times "vclgdb\t" 2 } } */