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| author | Richard Sandiford <richard.sandiford@arm.com> | 2019-10-29 08:48:01 +0000 |
|---|---|---|
| committer | Richard Sandiford <rsandifo@gcc.gnu.org> | 2019-10-29 08:48:01 +0000 |
| commit | 28350fd1bee1e238e9c57b04c0796e1e17b659e4 (patch) | |
| tree | 6417b0f9dda58a72ec2169e997d3e8ce76c57507 /gcc | |
| parent | 183bfdafc6f1f98711c5400498a7268cc1441096 (diff) | |
| download | gcc-28350fd1bee1e238e9c57b04c0796e1e17b659e4.zip gcc-28350fd1bee1e238e9c57b04c0796e1e17b659e4.tar.gz gcc-28350fd1bee1e238e9c57b04c0796e1e17b659e4.tar.bz2 | |
[AArch64] Extend SVE reverse permutes to predicates
This is tested by the main SVE ACLE patches, but since it affects
the evpc routines, it seemed worth splitting out.
2019-10-29 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* config/aarch64/aarch64-sve.md (@aarch64_sve_rev<PRED_ALL:mode>):
New pattern.
* config/aarch64/aarch64.c (aarch64_evpc_rev_global): Handle all
SVE modes.
From-SVN: r277562
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 7 | ||||
| -rw-r--r-- | gcc/config/aarch64/aarch64-sve.md | 15 | ||||
| -rw-r--r-- | gcc/config/aarch64/aarch64.c | 2 |
3 files changed, 23 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index a80a8e1..d0c9ac2 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,12 @@ 2019-10-29 Richard Sandiford <richard.sandiford@arm.com> + * config/aarch64/aarch64-sve.md (@aarch64_sve_rev<PRED_ALL:mode>): + New pattern. + * config/aarch64/aarch64.c (aarch64_evpc_rev_global): Handle all + SVE modes. + +2019-10-29 Richard Sandiford <richard.sandiford@arm.com> + * config/aarch64/aarch64.md (FFR_REGNUM, FFRT_REGNUM): New constants. * config/aarch64/aarch64.h (FIRST_PSEUDO_REGISTER): Bump to FFRT_REGNUM + 1. diff --git a/gcc/config/aarch64/aarch64-sve.md b/gcc/config/aarch64/aarch64-sve.md index 41c8689..2d93d72 100644 --- a/gcc/config/aarch64/aarch64-sve.md +++ b/gcc/config/aarch64/aarch64-sve.md @@ -111,6 +111,7 @@ ;; ---- [INT,FP] General permutes ;; ---- [INT,FP] Special-purpose unary permutes ;; ---- [INT,FP] Special-purpose binary permutes +;; ---- [PRED] Special-purpose unary permutes ;; ---- [PRED] Special-purpose binary permutes ;; ;; == Conversions @@ -4750,6 +4751,20 @@ ) ;; ------------------------------------------------------------------------- +;; ---- [PRED] Special-purpose unary permutes +;; ------------------------------------------------------------------------- +;; Includes: +;; - REV +;; ------------------------------------------------------------------------- + +(define_insn "@aarch64_sve_rev<mode>" + [(set (match_operand:PRED_ALL 0 "register_operand" "=Upa") + (unspec:PRED_ALL [(match_operand:PRED_ALL 1 "register_operand" "Upa")] + UNSPEC_REV))] + "TARGET_SVE" + "rev\t%0.<Vetype>, %1.<Vetype>") + +;; ------------------------------------------------------------------------- ;; ---- [PRED] Special-purpose binary permutes ;; ------------------------------------------------------------------------- ;; Includes: diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index 466910d..3b4290a 100644 --- a/gcc/config/aarch64/aarch64.c +++ b/gcc/config/aarch64/aarch64.c @@ -18156,7 +18156,7 @@ aarch64_evpc_rev_global (struct expand_vec_perm_d *d) { poly_uint64 nelt = d->perm.length (); - if (!d->one_vector_p || d->vec_flags != VEC_SVE_DATA) + if (!d->one_vector_p || d->vec_flags == VEC_ADVSIMD) return false; if (!d->perm.series_p (0, 1, nelt - 1, -1)) |