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authorJerome Lambourg <lambourg@adacore.com>2019-11-14 16:11:30 +0000
committerOlivier Hainque <hainque@gcc.gnu.org>2019-11-14 16:11:30 +0000
commit27204060db51ed0637e394dff387c66c6b944726 (patch)
treeed26512bbc98d251f21922b5a76f51784fd65d14 /gcc
parent071ef254a8a9ad947e72b37cd4aa695b57e5b031 (diff)
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Update the arm-*-vxworks* support
2019-11-13 Jerome Lambourg <lambourg@adacore.com> Doug Rupp <rupp@adacore.com> Olivier Hainque <hainque@adacore.com> gcc/ * config.gcc: Collapse the arm-vxworks entries into a single arm-wrs-vxworks7* one, bpabi based. Update the default cpu from arm8 to armv7-a * config/arm/vxworks.h (CC1_SPEC): Simplify, knowing that we always use ARM_UNWIND_INFO. (DWARF2_UNWIND_INFO): Remove redefinition. (ARM_TARGET2_DWARF_FORMAT): Likewise. (VXWORKS_PERSONALITY): Define, to "llvm". (VXWORKS_EXTRA_LIBS_RTP): Define, to "-lllvm". libgcc/ * config.host: Collapse the arm-vxworks entries into a single arm-wrs-vxworks7* one. * config/arm/unwind-arm-vxworks.c: Update comments. Provide __gnu_Unwind_Find_exidx and a weak dummy __cxa_type_match for kernel modules, to be overriden by libstdc++ when we link with it. Rely on externally provided __exidx_start/end. Co-Authored-By: Doug Rupp <rupp@adacore.com> Co-Authored-By: Olivier Hainque <hainque@adacore.com> From-SVN: r278253
Diffstat (limited to 'gcc')
-rw-r--r--gcc/ChangeLog14
-rw-r--r--gcc/config.gcc26
-rw-r--r--gcc/config/arm/t-vxworks7
-rw-r--r--gcc/config/arm/vxworks.h26
4 files changed, 38 insertions, 35 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index ddba96a..7140f5a 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,4 +1,18 @@
2019-11-14 Jerome Lambourg <lambourg@adacore.com>
+ Doug Rupp <rupp@adacore.com>
+ Olivier Hainque <hainque@adacore.com>
+
+ * config.gcc: Collapse the arm-vxworks entries into
+ a single arm-wrs-vxworks7* one, bpabi based. Update
+ the default cpu from arm8 to armv7-a
+ * config/arm/vxworks.h (CC1_SPEC): Simplify, knowing that
+ we always use ARM_UNWIND_INFO.
+ (DWARF2_UNWIND_INFO): Remove redefinition.
+ (ARM_TARGET2_DWARF_FORMAT): Likewise.
+ (VXWORKS_PERSONALITY): Define, to "llvm".
+ (VXWORKS_EXTRA_LIBS_RTP): Define, to "-lllvm".
+
+2019-11-14 Jerome Lambourg <lambourg@adacore.com>
* config/arm/vxworks.h (TARGET_OS_CPP_BUILTINS): Use
_VX_CPU instead of CPU and handle arm_arch8.
diff --git a/gcc/config.gcc b/gcc/config.gcc
index ea45b44..5aa0130 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -1148,23 +1148,17 @@ arc*-*-linux*)
# automatically detect that GAS supports it, yet we require it.
gcc_cv_initfini_array=yes
;;
-arm-wrs-vxworks|arm-wrs-vxworks7)
+arm-wrs-vxworks7*)
+ # We only support VxWorks 7 now on ARM, post SR600. Pre SR600
+ # VxWorks 7 was transitory and major versions prior to 7 were based
+ # on long deprecated ABI, not supported at all any more regardless
+ # of VxWorks.
extra_options="${extra_options} arm/vxworks.opt"
- tmake_file="${tmake_file} arm/t-arm arm/t-vxworks"
- case $target in
- *-vxworks7)
- # VxWorks7 on ARM adheres to the ARM Base Platform ABI
- tmake_file="${tmake_file} arm/t-bpabi"
- tm_file="arm/bpabi.h ${tm_file}"
- # The BPABI long long divmod functions return a 128-bit value in
- # registers r0-r3.
- need_64bit_hwint=yes
- default_use_cxa_atexit=yes
- ;;
- *) ;;
- esac
- tm_file="elfos.h arm/elf.h arm/aout.h ${tm_file} vx-common.h vxworks.h arm/vxworks.h"
- target_cpu_cname="arm8"
+ tmake_file="${tmake_file} arm/t-arm arm/t-vxworks arm/t-bpabi"
+ tm_file="elfos.h arm/elf.h arm/bpabi.h arm/aout.h ${tm_file}"
+ tm_file="${tm_file} vx-common.h vxworks.h arm/vxworks.h"
+ target_cpu_cname="armv7-a"
+ need_64bit_hwint=yes
;;
arm*-*-freebsd*) # ARM FreeBSD EABI
tm_file="dbxelf.h elfos.h ${fbsd_tm_file} arm/elf.h"
diff --git a/gcc/config/arm/t-vxworks b/gcc/config/arm/t-vxworks
index 504d5cc..865eabc 100644
--- a/gcc/config/arm/t-vxworks
+++ b/gcc/config/arm/t-vxworks
@@ -16,7 +16,8 @@
# along with GCC; see the file COPYING3. If not see
# <http://www.gnu.org/licenses/>.
-MULTILIB_OPTIONS = mrtp fPIC
+# Multilibs for ARM VxWorks. With the move to VxWorks 7, we only
+# support -mrtp variation on top of the default settings at this
+# stage, without PIC.
-# -fPIC alone is not supported, only together with -mrtp
-MULTILIB_EXCEPTIONS = fPIC
+MULTILIB_OPTIONS = mrtp
diff --git a/gcc/config/arm/vxworks.h b/gcc/config/arm/vxworks.h
index f03b19a..8118e6e 100644
--- a/gcc/config/arm/vxworks.h
+++ b/gcc/config/arm/vxworks.h
@@ -84,15 +84,8 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
/* .text.hot and .text.unlikely sections are badly handled by the
VxWorks kernel mode loader for ARM style exceptions. */
-
-#if ARM_UNWIND_INFO
-#define EXTRA_CC1_SPEC "%{!mrtp:-fno-reorder-functions}"
-#else
-#define EXTRA_CC1_SPEC
-#endif
-
#undef CC1_SPEC
-#define CC1_SPEC "" EXTRA_CC1_SPEC
+#define CC1_SPEC VXWORKS_CC1_SPEC " %{!mrtp:-fno-reorder-functions}"
/* Translate an explicit -mbig-endian as an explicit -EB to assembler
and linker, and pass abi options matching the target expectations
@@ -121,14 +114,6 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
#undef ENDFILE_SPEC
#define ENDFILE_SPEC VXWORKS_ENDFILE_SPEC
-/* For exceptions, pre VX7 uses DWARF2 info, VX7 uses ARM unwinding. */
-#undef DWARF2_UNWIND_INFO
-#define DWARF2_UNWIND_INFO (!TARGET_VXWORKS7)
-
-#undef ARM_TARGET2_DWARF_FORMAT
-#define ARM_TARGET2_DWARF_FORMAT \
- (TARGET_VXWORKS_RTP ? (DW_EH_PE_pcrel | DW_EH_PE_indirect) : DW_EH_PE_absptr)
-
/* There is no default multilib. */
#undef MULTILIB_DEFAULTS
@@ -160,3 +145,12 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
/* Unless overridded by the target options, the default is little-endian. */
#define TARGET_ENDIAN_DEFAULT 0
+
+/* The VxWorks environment on ARM is llvm based and we need to link
+ against libllvm.a to resolve __aeabi_memcpy4. */
+
+#undef VXWORKS_PERSONALITY
+#define VXWORKS_PERSONALITY "llvm"
+
+#undef VXWORKS_EXTRA_LIBS_RTP
+#define VXWORKS_EXTRA_LIBS_RTP "-lllvm"