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| author | Michael Hayes <m.hayes@elec.canterbury.ac.nz> | 2000-07-30 08:21:43 +0000 |
|---|---|---|
| committer | Michael Hayes <m.hayes@gcc.gnu.org> | 2000-07-30 08:21:43 +0000 |
| commit | 25cd0db18fc533cfe4b7dd6df915f63a5a7bf948 (patch) | |
| tree | 378a6ba0bf7ecff499dbc724a04934a4bd3bff25 /gcc | |
| parent | 0ea1f6b69f728ae6b87b8d0c5fc0cfbcd8b21da7 (diff) | |
| download | gcc-25cd0db18fc533cfe4b7dd6df915f63a5a7bf948.zip gcc-25cd0db18fc533cfe4b7dd6df915f63a5a7bf948.tar.gz gcc-25cd0db18fc533cfe4b7dd6df915f63a5a7bf948.tar.bz2 | |
* config/c4x/c4x.h (IS_XXX_REGNO): Rewrite to avoid unsigned warnings.
From-SVN: r35336
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/config/c4x/c4x.h | 18 |
2 files changed, 17 insertions, 7 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index a061e29..eab56e7 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,6 +1,10 @@ 2000-07-30 Michael Hayes <m.hayes@elec.canterbury.ac.nz> - * config/c4x/libgcc.S: (divqf3): Improve accuracy. + * config/c4x/c4x.h (IS_XXX_REGNO): Rewrite to avoid unsigned warnings. + +2000-07-30 Michael Hayes <m.hayes@elec.canterbury.ac.nz> + + * config/c4x/libgcc.S (divqf3): Improve accuracy. 2000-07-27 Mark Mitchell <mark@codesourcery.com> diff --git a/gcc/config/c4x/c4x.h b/gcc/config/c4x/c4x.h index 06f2873..7f2a109 100644 --- a/gcc/config/c4x/c4x.h +++ b/gcc/config/c4x/c4x.h @@ -449,17 +449,23 @@ extern const char *c4x_rpts_cycles_string, *c4x_cpu_version_string; /* Extended precision registers (low set). */ -#define IS_R0R1_REGNO(r) ((((r) >= R0_REGNO) && ((r) <= R1_REGNO))) -#define IS_R2R3_REGNO(r) ((((r) >= R2_REGNO) && ((r) <= R3_REGNO))) -#define IS_EXT_LOW_REGNO(r) ((((r) >= R0_REGNO) && ((r) <= R7_REGNO))) +#define IS_R0R1_REGNO(r) \ + ((unsigned int)((r) - R0_REGNO) <= (R1_REGNO - R0_REGNO)) +#define IS_R2R3_REGNO(r) \ + ((unsigned int)((r) - R2_REGNO) <= (R3_REGNO - R2_REGNO)) +#define IS_EXT_LOW_REGNO(r) \ + ((unsigned int)((r) - R0_REGNO) <= (R7_REGNO - R0_REGNO)) /* Extended precision registers (high set). */ -#define IS_EXT_HIGH_REGNO(r) (! TARGET_C3X \ - && ((r) >= R8_REGNO) && ((r) <= R11_REGNO)) +#define IS_EXT_HIGH_REGNO(r) \ +(! TARGET_C3X \ + && ((unsigned int) ((r) - R8_REGNO) <= (R11_REGNO - R8_REGNO))) + /* Address registers. */ -#define IS_AUX_REGNO(r) (((r) >= AR0_REGNO) && ((r) <= AR7_REGNO)) +#define IS_AUX_REGNO(r) \ + ((unsigned int)((r) - AR0_REGNO) <= (AR7_REGNO - AR0_REGNO)) #define IS_ADDR_REGNO(r) IS_AUX_REGNO(r) #define IS_DP_REGNO(r) ((r) == DP_REGNO) #define IS_INDEX_REGNO(r) (((r) == IR0_REGNO) || ((r) == IR1_REGNO)) |