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| author | J"orn Rennecke <joern.rennecke@superh.com> | 2002-07-23 19:57:42 +0000 |
|---|---|---|
| committer | Joern Rennecke <amylaar@gcc.gnu.org> | 2002-07-23 20:57:42 +0100 |
| commit | 1d5fa6b42508d546fe875bb6809e645523f01e70 (patch) | |
| tree | b2e5aee83e61e4c8bb623f626ccb844981dd9982 /gcc | |
| parent | 10d6af32dd368c41b5796bcd29e31177c05a416c (diff) | |
| download | gcc-1d5fa6b42508d546fe875bb6809e645523f01e70.zip gcc-1d5fa6b42508d546fe875bb6809e645523f01e70.tar.gz gcc-1d5fa6b42508d546fe875bb6809e645523f01e70.tar.bz2 | |
simplify-rtx.x (simplify_subreg): When constructing a CONST_VECTOR from individual subregs...
* simplify-rtx.x (simplify_subreg): When constructing a CONST_VECTOR
from individual subregs, check that each subreg has been generated
sucessfully.
From-SVN: r55686
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/simplify-rtx.c | 9 |
2 files changed, 14 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 90bf680..36d45ca 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +Tue Jul 23 20:56:03 2002 J"orn Rennecke <joern.rennecke@superh.com> + + * simplify-rtx.x (simplify_subreg): When constructing a CONST_VECTOR + from individual subregs, check that each subreg has been generated + sucessfully. + 2002-07-23 Neil Booth <neil@daikokuya.co.uk> * genautomata.c (VLA_HWINT_SHORTEN, VLA_HWINT_LAST): Remove. diff --git a/gcc/simplify-rtx.c b/gcc/simplify-rtx.c index c69084f7..d07de68 100644 --- a/gcc/simplify-rtx.c +++ b/gcc/simplify-rtx.c @@ -2367,10 +2367,17 @@ simplify_subreg (outermode, op, innermode, byte) int subsize = GET_MODE_UNIT_SIZE (outermode); int i, elts = GET_MODE_NUNITS (outermode); rtvec v = rtvec_alloc (elts); + rtx elt; for (i = 0; i < elts; i++, byte += subsize) { - RTVEC_ELT (v, i) = simplify_subreg (submode, op, innermode, byte); + /* This might fail, e.g. if taking a subreg from a SYMBOL_REF. */ + /* ??? It would be nice if we could actually make such subregs + on targets that allow such relocations. */ + elt = simplify_subreg (submode, op, innermode, byte); + if (! elt) + return NULL_RTX; + RTVEC_ELT (v, i) = elt; } return gen_rtx_CONST_VECTOR (outermode, v); } |