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authorRichard Sandiford <rdsandiford@googlemail.com>2012-02-05 14:53:09 +0000
committerRichard Sandiford <rsandifo@gcc.gnu.org>2012-02-05 14:53:09 +0000
commit16955e8bf016705622c9124a22e39de2fcef2550 (patch)
tree6e9fb2c12f45bd9ef6636efe7ac574b2a47da5b2 /gcc
parent7bd8c53f50564ff3dd4f7a24363c4e2cb3e9c553 (diff)
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target-supports.exp (check_effective_target_mips_llsc): New.
gcc/testsuite/ * lib/target-supports.exp (check_effective_target_mips_llsc): New. (check_effective_target_sync_int_long): Use it. (check_effective_target_sync_char_short): Likewise. * gcc.target/mips/atomic-memory-1.c: Restrict error check to mips_llsc. From-SVN: r183909
Diffstat (limited to 'gcc')
-rw-r--r--gcc/testsuite/ChangeLog7
-rw-r--r--gcc/testsuite/gcc.target/mips/atomic-memory-1.c2
-rw-r--r--gcc/testsuite/lib/target-supports.exp24
3 files changed, 30 insertions, 3 deletions
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 92d7759..69e62cb 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,10 @@
+2012-02-05 Richard Sandiford <rdsandiford@googlemail.com>
+
+ * lib/target-supports.exp (check_effective_target_mips_llsc): New.
+ (check_effective_target_sync_int_long): Use it.
+ (check_effective_target_sync_char_short): Likewise.
+ * gcc.target/mips/atomic-memory-1.c: Restrict error check to mips_llsc.
+
2012-02-05 Tobias Burnus <burnus@net-b.de>
PR fortran/51972
diff --git a/gcc/testsuite/gcc.target/mips/atomic-memory-1.c b/gcc/testsuite/gcc.target/mips/atomic-memory-1.c
index b2316ee..839d75c 100644
--- a/gcc/testsuite/gcc.target/mips/atomic-memory-1.c
+++ b/gcc/testsuite/gcc.target/mips/atomic-memory-1.c
@@ -1,6 +1,6 @@
/* { dg-do run } */
-/* { dg-message "note: '__sync_nand_and_fetch' changed semantics in GCC 4.4" "" { target *-*-* } 0 } */
+/* { dg-message "note: '__sync_nand_and_fetch' changed semantics in GCC 4.4" "" { target mips_llsc } 0 } */
extern void abort (void);
extern void exit (int);
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index b192779..ca10143 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -890,6 +890,26 @@ proc check_effective_target_mips_newabi_large_long_double { } {
} "-mabi=64"]
}
+# Return true if the target is a MIPS target that has access
+# to the LL and SC instructions.
+
+proc check_effective_target_mips_llsc { } {
+ if { ![istarget mips*-*-*] } {
+ return 0
+ }
+ # Assume that these instructions are always implemented for
+ # non-elf* targets, via emulation if necessary.
+ if { ![istarget *-*-elf*] } {
+ return 1
+ }
+ # Otherwise assume LL/SC support for everything but MIPS I.
+ return [check_no_compiler_messages mips_llsc assembly {
+ #if __mips == 1
+ #error FOO
+ #endif
+ }]
+}
+
# Return 1 if the current multilib does not generate PIC by default.
proc check_effective_target_nonpic { } {
@@ -3770,7 +3790,7 @@ proc check_effective_target_sync_int_long { } {
|| [istarget powerpc*-*-*]
|| [istarget sparc64-*-*]
|| [istarget sparcv9-*-*]
- || [istarget mips*-*-*] } {
+ || [check_effective_target_mips_llsc] } {
set et_sync_int_long_saved 1
}
}
@@ -3800,7 +3820,7 @@ proc check_effective_target_sync_char_short { } {
|| [istarget powerpc*-*-*]
|| [istarget sparc64-*-*]
|| [istarget sparcv9-*-*]
- || [istarget mips*-*-*] } {
+ || [check_effective_target_mips_llsc] } {
set et_sync_char_short_saved 1
}
}