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| author | Uros Bizjak <ubizjak@gmail.com> | 2007-06-22 19:51:06 +0200 |
|---|---|---|
| committer | Uros Bizjak <uros@gcc.gnu.org> | 2007-06-22 19:51:06 +0200 |
| commit | 147bbdd05159934639f00269720f82be8647bc5d (patch) | |
| tree | ab01ef3ba14db459ad82bdad2228270471d18a28 /gcc | |
| parent | 58a954543504c444f88ce45d308474cdc8987eec (diff) | |
| download | gcc-147bbdd05159934639f00269720f82be8647bc5d.zip gcc-147bbdd05159934639f00269720f82be8647bc5d.tar.gz gcc-147bbdd05159934639f00269720f82be8647bc5d.tar.bz2 | |
re PR target/32413 (internal compiler error: in reload_cse_simplify_operands, at postreload.c:396)
PR target/32413
* config/i386/i386.c (ix86_register_move_cost): Rise the cost of
moves between MMX/SSE registers to at least 8 units to prevent
ICE caused by non-tieable SI/HI/QImodes in SSE registers.
From-SVN: r125951
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 7 | ||||
| -rw-r--r-- | gcc/config/i386/i386.c | 10 |
2 files changed, 16 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index e97babf..349272b 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,12 @@ 2007-06-22 Uros Bizjak <ubizjak@gmail.com> + PR target/32413 + * config/i386/i386.c (ix86_register_move_cost): Rise the cost of + moves between MMX/SSE registers to at least 8 units to prevent + ICE caused by non-tieable SI/HI/QImodes in SSE registers. + +2007-06-22 Uros Bizjak <ubizjak@gmail.com> + * config/i386/i386.c (override_options): Correct x86_sahf setting condition. diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 1483cac..5c5cb52 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -20279,7 +20279,15 @@ ix86_register_move_cost (enum machine_mode mode, enum reg_class class1, /* Moves between SSE/MMX and integer unit are expensive. */ if (MMX_CLASS_P (class1) != MMX_CLASS_P (class2) || SSE_CLASS_P (class1) != SSE_CLASS_P (class2)) - return ix86_cost->mmxsse_to_integer; + + /* ??? By keeping returned value relatively high, we limit the number + of moves between integer and MMX/SSE registers for all targets. + Additionally, high value prevents problem with x86_modes_tieable_p(), + where integer modes in MMX/SSE registers are not tieable + because of missing QImode and HImode moves to, from or between + MMX/SSE registers. */ + return MAX (ix86_cost->mmxsse_to_integer, 8); + if (MAYBE_FLOAT_CLASS_P (class1)) return ix86_cost->fp_move; if (MAYBE_SSE_CLASS_P (class1)) |