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| author | Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp> | 2022-05-06 19:34:19 +0900 |
|---|---|---|
| committer | Max Filippov <jcmvbkbc@gmail.com> | 2022-05-13 02:31:26 -0700 |
| commit | 112447f8564c0307c5da99a4094a3a99f204239f (patch) | |
| tree | 332296f50b54c389d1fe179f9e7e6382de6795ff /gcc | |
| parent | d543bac1631700f0da30d5ca555296f4938a82c6 (diff) | |
| download | gcc-112447f8564c0307c5da99a4094a3a99f204239f.zip gcc-112447f8564c0307c5da99a4094a3a99f204239f.tar.gz gcc-112447f8564c0307c5da99a4094a3a99f204239f.tar.bz2 | |
xtensa: Reflect the 32-bit Integer Divide Option
On Espressif's ESP8266 (based on Tensilica LX106, no hardware divider),
this patch reduces the size of each:
__moddi3() @ libgcc.a : 969 -> 301 (saves 668)
__divmoddi4() : 1111 -> 426 (saves 685)
__udivmoddi4() : 1043 -> 319 (saves 724)
in bytes, respectively.
gcc/ChangeLog:
* config/xtensa/xtensa.h (TARGET_HAS_NO_HW_DIVIDE): New macro
definition.
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/config/xtensa/xtensa.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/gcc/config/xtensa/xtensa.h b/gcc/config/xtensa/xtensa.h index 00e2930..d25594f 100644 --- a/gcc/config/xtensa/xtensa.h +++ b/gcc/config/xtensa/xtensa.h @@ -75,6 +75,11 @@ along with GCC; see the file COPYING3. If not see #define HAVE_AS_TLS 0 #endif +/* Define this if the target has no hardware divide instructions. */ +#if !TARGET_DIV32 +#define TARGET_HAS_NO_HW_DIVIDE +#endif + /* Target CPU builtins. */ #define TARGET_CPU_CPP_BUILTINS() \ |