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| author | Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | 2023-01-20 17:33:09 +0800 |
|---|---|---|
| committer | Kito Cheng <kito.cheng@sifive.com> | 2023-01-27 17:59:08 +0800 |
| commit | 0f024ff988aeaacd8d0f967c5f841ab20fb40c19 (patch) | |
| tree | a951342912671194d655a179b2e166433853bee1 /gcc | |
| parent | b0241ce6e37031e1cbde73d5389ec7f1d063e099 (diff) | |
| download | gcc-0f024ff988aeaacd8d0f967c5f841ab20fb40c19.zip gcc-0f024ff988aeaacd8d0f967c5f841ab20fb40c19.tar.gz gcc-0f024ff988aeaacd8d0f967c5f841ab20fb40c19.tar.bz2 | |
RISC-V: Add TARGET_MIN_VLEN > 32 into iterators of EEW = 64 vector modes
According to RVV ISA, RVV doesn't support EEW == 64 vector type for zve32x
and zve32f. So it makes sense add predicate in the iterators of EEW = 64
vector modes.
gcc/ChangeLog:
* config/riscv/vector-iterators.md: Add TARGET_MIN_VLEN > 32 predicates.
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/config/riscv/vector-iterators.md | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/gcc/config/riscv/vector-iterators.md b/gcc/config/riscv/vector-iterators.md index 840cd8d..c1ec234 100644 --- a/gcc/config/riscv/vector-iterators.md +++ b/gcc/config/riscv/vector-iterators.md @@ -22,7 +22,8 @@ VNx1QI VNx2QI VNx4QI VNx8QI VNx16QI VNx32QI (VNx64QI "TARGET_MIN_VLEN > 32") VNx1HI VNx2HI VNx4HI VNx8HI VNx16HI (VNx32HI "TARGET_MIN_VLEN > 32") VNx1SI VNx2SI VNx4SI VNx8SI (VNx16SI "TARGET_MIN_VLEN > 32") - VNx1DI VNx2DI VNx4DI (VNx8DI "TARGET_MIN_VLEN > 32") + (VNx1DI "TARGET_MIN_VLEN > 32") (VNx2DI "TARGET_MIN_VLEN > 32") + (VNx4DI "TARGET_MIN_VLEN > 32") (VNx8DI "TARGET_MIN_VLEN > 32") (VNx1SF "TARGET_VECTOR_ELEN_FP_32") (VNx2SF "TARGET_VECTOR_ELEN_FP_32") (VNx4SF "TARGET_VECTOR_ELEN_FP_32") @@ -38,7 +39,8 @@ (VNx4QI "TARGET_MIN_VLEN == 32") VNx8QI VNx16QI VNx32QI (VNx64QI "TARGET_MIN_VLEN > 32") (VNx2HI "TARGET_MIN_VLEN == 32") VNx4HI VNx8HI VNx16HI (VNx32HI "TARGET_MIN_VLEN > 32") (VNx1SI "TARGET_MIN_VLEN == 32") VNx2SI VNx4SI VNx8SI (VNx16SI "TARGET_MIN_VLEN > 32") - VNx1DI VNx2DI VNx4DI (VNx8DI "TARGET_MIN_VLEN > 32") + (VNx1DI "TARGET_MIN_VLEN > 32") (VNx2DI "TARGET_MIN_VLEN > 32") + (VNx4DI "TARGET_MIN_VLEN > 32") (VNx8DI "TARGET_MIN_VLEN > 32") (VNx1SF "TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN == 32") (VNx2SF "TARGET_VECTOR_ELEN_FP_32") (VNx4SF "TARGET_VECTOR_ELEN_FP_32") |