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| author | Vladimir Makarov <vmakarov@redhat.com> | 2013-01-15 16:47:36 +0000 |
|---|---|---|
| committer | Vladimir Makarov <vmakarov@gcc.gnu.org> | 2013-01-15 16:47:36 +0000 |
| commit | 0e80383ffb72168e9609e2be58649ff641150677 (patch) | |
| tree | 7eb4f52fdc63295571a2791013191373cd326269 /gcc | |
| parent | 207b59560f7c136462aec8df61bb36fd0191eaab (diff) | |
| download | gcc-0e80383ffb72168e9609e2be58649ff641150677.zip gcc-0e80383ffb72168e9609e2be58649ff641150677.tar.gz gcc-0e80383ffb72168e9609e2be58649ff641150677.tar.bz2 | |
PR rtl-optimization/pr55153
2013-01-15 Vladimir Makarov <vmakarov@redhat.com>
PR rtl-optimization/pr55153
* sched-deps.c (sched_analyze_2): Add pending reads for prefetch.
2013-01-15 Vladimir Makarov <vmakarov@redhat.com>
PR rtl-optimization/pr55153
* gcc.dg/pr55153.c: New.
From-SVN: r195211
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/sched-deps.c | 14 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.dg/pr55153.c | 11 |
4 files changed, 35 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 15b1503..75efa7a 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2013-01-15 Vladimir Makarov <vmakarov@redhat.com> + + PR rtl-optimization/pr55153 + * sched-deps.c (sched_analyze_2): Add pending reads for prefetch. + 2013-01-15 Martin Jambor <mjambor@suse.cz> PR tree-optimization/55920 diff --git a/gcc/sched-deps.c b/gcc/sched-deps.c index f61e837..3f37aa0 100644 --- a/gcc/sched-deps.c +++ b/gcc/sched-deps.c @@ -2707,6 +2707,20 @@ sched_analyze_2 (struct deps_desc *deps, rtx x, rtx insn) case PREFETCH: if (PREFETCH_SCHEDULE_BARRIER_P (x)) reg_pending_barrier = TRUE_BARRIER; + /* Prefetch insn contains addresses only. So if the prefetch + address has no registers, there will be no dependencies on + the prefetch insn. This is wrong with result code + correctness point of view as such prefetch can be moved below + a jump insn which usually generates MOVE_BARRIER preventing + to move insns containing registers or memories through the + barrier. It is also wrong with generated code performance + point of view as prefetch withouth dependecies will have a + tendency to be issued later instead of earlier. It is hard + to generate accurate dependencies for prefetch insns as + prefetch has only the start address but it is better to have + something than nothing. */ + add_insn_mem_dependence (deps, true, insn, + gen_rtx_MEM (Pmode, XEXP (PATTERN (insn), 0))); break; case UNSPEC_VOLATILE: diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index c20ed62..340bbce 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2013-01-15 Vladimir Makarov <vmakarov@redhat.com> + + PR rtl-optimization/pr55153 + * gcc.dg/pr55153.c: New. + 2013-01-15 Jakub Jelinek <jakub@redhat.com> PR tree-optimization/55920 diff --git a/gcc/testsuite/gcc.dg/pr55153.c b/gcc/testsuite/gcc.dg/pr55153.c new file mode 100644 index 0000000..86e9970 --- /dev/null +++ b/gcc/testsuite/gcc.dg/pr55153.c @@ -0,0 +1,11 @@ +/* PR tree-optimization/55153 */ +/* { dg-do compile } */ +/* { dg-options "-O -fsched2-use-superblocks -fschedule-insns2" } */ + +extern int a[]; + +void +foo (void) +{ + __builtin_prefetch (a, 0, 0); +} |