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author | Olivier Hainque <hainque@act-europe.fr> | 2004-03-23 22:54:36 +0100 |
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committer | Olivier Hainque <hainque@gcc.gnu.org> | 2004-03-23 21:54:36 +0000 |
commit | 0c0ab0f1e8936341273663940ea12f84b0a109ad (patch) | |
tree | 9e138ca5957f7bc7e59eeabd4f1cce25b81c4ebd /gcc | |
parent | 22421b79c8da16dd6dccb2232c1da6096590e525 (diff) | |
download | gcc-0c0ab0f1e8936341273663940ea12f84b0a109ad.zip gcc-0c0ab0f1e8936341273663940ea12f84b0a109ad.tar.gz gcc-0c0ab0f1e8936341273663940ea12f84b0a109ad.tar.bz2 |
optabs.c (expand_binop): When synthesizing double word rotates from single word shifts...
* optabs.c (expand_binop): When synthesizing double word rotates
from single word shifts, use a new register target if the provided
target is not a REG already.
From-SVN: r79875
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/ChangeLog | 6 | ||||
-rw-r--r-- | gcc/optabs.c | 8 |
2 files changed, 12 insertions, 2 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 82b3453..9b4f247 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2004-03-23 Olivier Hainque <hainque@act-europe.fr> + + * optabs.c (expand_binop): When synthesizing double word rotates + from single word shifts, use a new register target if the provided + target is not a REG already. + 2004-03-23 Richard Kenner <kenner@vlsi1.ultra.nyu.edu> * alias.c (get_alias_set): Add support for TYPE_REF_CAN_ALIAS_ALL. diff --git a/gcc/optabs.c b/gcc/optabs.c index b9439a7..0dfc093 100644 --- a/gcc/optabs.c +++ b/gcc/optabs.c @@ -1087,8 +1087,12 @@ expand_binop (enum machine_mode mode, optab binoptab, rtx op0, rtx op1, int shift_count, left_shift, outof_word; /* If TARGET is the same as one of the operands, the REG_EQUAL note - won't be accurate, so use a new target. */ - if (target == 0 || target == op0 || target == op1) + won't be accurate, so use a new target. Do this also if target is not + a REG, first because having a register instead may open optimization + oportunities, and second because if target and op0 happen to be MEMs + designating the same location, we would risk clobbering it too early + in the code sequence we generate below. */ + if (target == 0 || target == op0 || target == op1 || ! REG_P (target)) target = gen_reg_rtx (mode); start_sequence (); |