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authorXionghu Luo <luoxhu@linux.ibm.com>2021-03-24 19:46:12 -0500
committerXionghu Luo <luoxhu@linux.ibm.com>2021-03-24 19:51:43 -0500
commit08103e4d6ada9b57366f2df2a2b745babfab914c (patch)
tree572eda639d30ce86f08afe2eca0aab59e201b863 /gcc
parent71fc4655ab86ab66b40165b2cb49c1395ca82a9a (diff)
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rs6000: Correct Power8 cost of l2 cache size [PR97329]
l2 cache size for Power8 is 512kB, it was copied from Power7 before public. Tested no performance change for SPEC2017. gcc/ChangeLog: 2021-03-24 Xionghu Luo <luoxhu@linux.ibm.com> * config/rs6000/rs6000.c (power8_costs): Change l2 cache from 256 to 512.
Diffstat (limited to 'gcc')
-rw-r--r--gcc/config/rs6000/rs6000.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index 616dae3..34c4eda 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -1055,7 +1055,7 @@ struct processor_costs power8_cost = {
COSTS_N_INSNS (17), /* ddiv */
128, /* cache line size */
32, /* l1 cache */
- 256, /* l2 cache */
+ 512, /* l2 cache */
12, /* prefetch streams */
COSTS_N_INSNS (3), /* SF->DF convert */
};