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| author | David Edelsohn <edelsohn@gnu.org> | 1996-01-28 05:56:49 +0000 |
|---|---|---|
| committer | David Edelsohn <edelsohn@gnu.org> | 1996-01-28 05:56:49 +0000 |
| commit | 08075eadc86ace70dfc2b48ec9f0dd36ddbcdf82 (patch) | |
| tree | 3f015d0b55935fde03325a71604d8ca897845408 /gcc | |
| parent | ac2a93a1eab20dc61f48b74694d73edee1ccb2dc (diff) | |
| download | gcc-08075eadc86ace70dfc2b48ec9f0dd36ddbcdf82.zip gcc-08075eadc86ace70dfc2b48ec9f0dd36ddbcdf82.tar.gz gcc-08075eadc86ace70dfc2b48ec9f0dd36ddbcdf82.tar.bz2 | |
movdf 64bit and movdi matcher 64bit
From-SVN: r11119
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/config/rs6000/rs6000.md | 35 |
1 files changed, 31 insertions, 4 deletions
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 009175e..0b08b0b 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -5143,6 +5143,23 @@ if (GET_CODE (operands[0]) != REG) operands[1] = force_reg (DFmode, operands[1]); + /* Stores between FPR and any non-FPR registers must go through a + temporary stack slot. */ + + if (TARGET_POWERPC64 + && GET_CODE (operands[0]) == REG && GET_CODE (operands[1]) == REG + && ((FP_REGNO_P (REGNO (operands[0])) + && ! FP_REGNO_P (REGNO (operands[1]))) + || (FP_REGNO_P (REGNO (operands[1])) + && ! FP_REGNO_P (REGNO (operands[0]))))) + { + rtx stack_slot = assign_stack_temp (DFmode, 8, 0); + + emit_move_insn (stack_slot, operands[1]); + emit_move_insn (operands[0], stack_slot); + DONE; + } + if (CONSTANT_P (operands[1]) && ! easy_fp_constant (operands[1], DFmode)) { operands[1] = force_const_mem (DFmode, operands[1]); @@ -5374,8 +5391,8 @@ (set_attr "length" "8,8,8,*,*,*")]) (define_insn "" - [(set (match_operand:DI 0 "nonimmediate_operand" "=r,r,m,r,r,r,f,f,m,r,*h") - (match_operand:DI 1 "input_operand" "r,m,r,I,J,R,f,m,f,*h,r"))] + [(set (match_operand:DI 0 "nonimmediate_operand" "=r,r,m,r,r,r,f,f,m,r,*h,*h") + (match_operand:DI 1 "input_operand" "r,m,r,I,J,R,f,m,f,*h,r,0"))] "TARGET_POWERPC64 && (gpc_reg_operand (operands[0], DImode) || gpc_reg_operand (operands[1], DImode))" "@ @@ -5389,8 +5406,18 @@ lfd%U1%X1 %0,%1 stfd%U0%X0 %1,%0 mf%1 %0 - mt%0 %1" - [(set_attr "type" "*,load,*,*,*,*,fp,fpload,*,*,mtjmpr")]) + mt%0 %1 + cror 0,0,0" + [(set_attr "type" "*,load,*,*,*,*,fp,fpload,*,*,mtjmpr,*")]) + +(define_insn "" + [(set (match_operand:CC 2 "cc_reg_operand" "=x") + (compare:CC (match_operand:DI 1 "gpc_reg_operand" "r") + (const_int 0))) + (set (match_operand:DI 0 "gpc_reg_operand" "=r") (match_dup 1))] + "TARGET_POWERPC64" + "mr. %0,%1" + [(set_attr "type" "compare")]) ;; TImode is similar, except that we usually want to compute the address into ;; a register and use lsi/stsi (the exception is during reload). MQ is also |