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authorKito Cheng <kito.cheng@sifive.com>2023-10-11 16:18:00 -0700
committerKito Cheng <kito.cheng@sifive.com>2023-10-11 16:20:31 -0700
commit06f36c1d83a7e8b6da47d3c5b325a963baee6aab (patch)
tree7e6230bb870dd4fef43e32b8acdb41b28dc4dec1 /gcc
parenta3e50ee96dc3e25ca52608e58c4e653f9976cb4e (diff)
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RISC-V: Add TARGET_MIN_VLEN_OPTS to fix the build
gcc/ChangeLog: * config/riscv/riscv-opts.h (TARGET_MIN_VLEN_OPTS): New.
Diffstat (limited to 'gcc')
-rw-r--r--gcc/config/riscv/riscv-opts.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/gcc/config/riscv/riscv-opts.h b/gcc/config/riscv/riscv-opts.h
index e7c6b75..31ee42d 100644
--- a/gcc/config/riscv/riscv-opts.h
+++ b/gcc/config/riscv/riscv-opts.h
@@ -112,6 +112,12 @@ enum riscv_entity
? 0 \
: 32 << (__builtin_popcount (riscv_zvl_flags) - 1))
+/* Same as TARGET_MIN_VLEN, but take an OPTS as gcc_options. */
+#define TARGET_MIN_VLEN_OPTS(opts) \
+ ((opts->x_riscv_zvl_flags == 0) \
+ ? 0 \
+ : 32 << (__builtin_popcount (opts->x_riscv_zvl_flags) - 1))
+
/* We only enable VLS modes for VLA vectorization since fixed length VLMAX mode
is the highest priority choice and should not conflict with VLS modes. */
#define TARGET_VECTOR_VLS \