altivec-12.c (main): Add tests for vec_avg.

gcc/testsuite/ChangeLog:

2017-12-07  Carl Love  <cel@us.ibm.com>

	* gcc.target/powerpc/altivec-12.c (main):  Add tests for vec_avg.
	* gcc.target/powerpc/builtins-1.c: Renamed builtins-1.h.
	* gcc.target/powerpc/builtins-1.h: Add tests for vec_and,
	vec_andc, vec_cpsgn, vec_mergeh,vec_mergel, vec_nor, vec_or,
	vec_sel, vec_xor, vec_all_eq, vec_all_ge, vec_all_gt, vec_all_le,
	vec_all_lt, vec_all_ne,	vec_any_eq,vec_any_ge, vec_any_gt,vec_any_le,
	vec_any_lt, vec_any_ne, vec_cntlz, vec_round, vec_rsqrt, vec_rsqrte,
	vec_splat, vec_div, vec_mul,vec_ctf, vec_cts, vec_ctu.
	* gcc.target/powerpc/builtins-1-be.c: New file, big endian
	test file for tests in builtins-1.h.
	* gcc.target/powerpc/builtins-1-le.c: New file, little endian
	test file for tests in builtins-1.h.
	* gcc.target/powerpc/builtins-2.c (main): Add tests for vec_ctf,
	vec_cts, vec_ctu.
	* gcc.target/powerpc/builtins-3-runnable.c (test_result_sp): Fix printf
	conversion character.
 	* gcc.target/powerpc/fold-vec-minmax-char.c (test1_min, test2_min,
	test4_min, test1_max, test2_max): Add tests for vec_max and vec_min.
 	* gcc.target/powerpc/fold-vec-minmax-int.c (test4_min, test5_min,
	test7_min, test8_min): Add tests for vec_min.
 	* gcc.target/powerpc/fold-vec-minmax-longlong.c (test7_max, test8_max,
	test9_max, test10_max): Add tests for and vec_max.
 	* gcc.target/powerpc/fold-vec-minmax-short.c (test4_min, test5_min,
	tes7_min, test8_min): Add tests for and vec_min.
 	* gcc.target/powerpc/p8vector-builtin-8.c (foo): Add test for vec_adds,
	vec_subs, vec_sum2s, vec_sum4s.
 	* gcc.target/powerpc/vsx-splats-p8.c: New file to test vec_splats.
	* gcc.target/vsx-vector-5.c (arg1_tests_d, arg1_tests_d): Add
	tests for vec_ceil, vec_floor, vec_nearbyint, vec_sqrt.
	* gcc.target/vsx-vector-7.c (foo): Add tests for vec_sel.
	* gcc.target/vsx-vector-abss.c: New file to test vec_abss.

From-SVN: r255556

14 files changed, 635 insertions, 79 deletions

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 140df68..884c722 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,37 @@
+2017-12-07  Carl Love  <cel@us.ibm.com>
+
+	* gcc.target/powerpc/altivec-12.c (main):  Add tests for vec_avg.
+	* gcc.target/powerpc/builtins-1.c: Renamed builtins-1.h.
+	* gcc.target/powerpc/builtins-1.h: Add tests for vec_and,
+	vec_andc, vec_cpsgn, vec_mergeh,vec_mergel, vec_nor, vec_or,
+	vec_sel, vec_xor, vec_all_eq, vec_all_ge, vec_all_gt, vec_all_le,
+	vec_all_lt, vec_all_ne,	vec_any_eq,vec_any_ge, vec_any_gt,vec_any_le,
+	vec_any_lt, vec_any_ne, vec_cntlz, vec_round, vec_rsqrt, vec_rsqrte,
+	vec_splat, vec_div, vec_mul,vec_ctf, vec_cts, vec_ctu.
+	* gcc.target/powerpc/builtins-1-be.c: New file, big endian
+	test file for tests in builtins-1.h.
+	* gcc.target/powerpc/builtins-1-le.c: New file, little endian
+	test file for tests in builtins-1.h.
+	* gcc.target/powerpc/builtins-2.c (main): Add tests for vec_ctf,
+	vec_cts, vec_ctu.
+	* gcc.target/powerpc/builtins-3-runnable.c (test_result_sp): Fix printf
+	conversion character.
+ 	* gcc.target/powerpc/fold-vec-minmax-char.c (test1_min, test2_min,
+	test4_min, test1_max, test2_max): Add tests for vec_max and vec_min.
+ 	* gcc.target/powerpc/fold-vec-minmax-int.c (test4_min, test5_min,
+	test7_min, test8_min): Add tests for vec_min.
+ 	* gcc.target/powerpc/fold-vec-minmax-longlong.c (test7_max, test8_max,
+	test9_max, test10_max): Add tests for and vec_max.
+ 	* gcc.target/powerpc/fold-vec-minmax-short.c (test4_min, test5_min,
+	tes7_min, test8_min): Add tests for and vec_min.
+ 	* gcc.target/powerpc/p8vector-builtin-8.c (foo): Add test for vec_adds,
+	vec_subs, vec_sum2s, vec_sum4s.
+ 	* gcc.target/powerpc/vsx-splats-p8.c: New file to test vec_splats.
+	* gcc.target/vsx-vector-5.c (arg1_tests_d, arg1_tests_d): Add
+	tests for vec_ceil, vec_floor, vec_nearbyint, vec_sqrt.
+	* gcc.target/vsx-vector-7.c (foo): Add tests for vec_sel.
+	* gcc.target/vsx-vector-abss.c: New file to test vec_abss.
+
 2017-12-11  Carl Love  <cel@us.ibm.com>
 
 	* config/rs6000/altivec.h (vec_extract_fp32_from_shorth,
diff --git a/gcc/testsuite/gcc.target/powerpc/altivec-12.c b/gcc/testsuite/gcc.target/powerpc/altivec-12.c
index 39d2694..b0267b5 100644
--- a/gcc/testsuite/gcc.target/powerpc/altivec-12.c
+++ b/gcc/testsuite/gcc.target/powerpc/altivec-12.c
@@ -6,10 +6,33 @@
 /* Program to test PowerPC AltiVec instructions.  */
 
 #include <altivec.h>
+#include <stdio.h>
 
 extern void abort (void);
 #define CHECK_IF(E) if(!(E)) abort()
 
+vector char sca = {0,4,8,1,5,9,2,6,10,3,7,11,15,12,14,13};
+vector char scb = {6,4,8,3,1,9,2,6,10,3,7,11,15,12,14,13};
+vector char sc_expected = {3,4,8,2,3,9,2,6,10,3,7,11,15,12,14,13};
+vector char scz;
+vector unsigned char uca = {0,4,8,1,5,9,2,6,10,3,7,11,15,12,14,13};
+vector unsigned char ucb = {6,4,8,3,1,9,2,6,10,3,7,11,15,12,14,13};
+vector unsigned char uc_expected = {3,4,8,2,3,9,2,6,10,3,7,11,15,12,14,13};
+vector char ucz;
+
+vector short int ssia = {9, 16, 25, 36};
+vector short int ssib = {-8, -27, -64, -125};
+vector short int ssiz;
+
+vector short unsigned int ssua = {9, 16, 25, 36};
+vector short unsigned int ssub = {8, 27, 64, 125};
+vector short unsigned int ssuz;
+
+vector unsigned int uia = {22, 13, 24, 39};
+vector unsigned int uib = {8, 7, 4, 15};
+vector unsigned int ui_expected = {15, 10, 14, 27};
+vector unsigned int uiz;
+
 vector int a1 = (vector int){ 100, 200, 300, 400 };
 vector int a2 = (vector int){ 500, 600, 700, 800 };
 vector int addi = (vector int){ 600, 800, 1000, 1200 };
@@ -24,8 +47,11 @@ vector float addf3 = (vector float){ 6.0, 8.0, 9.9, 12.1 };
 vector int k;
 vector float f, g, h;
 
+int i;
+
 int main ()
 {
+
   k = vec_add (a1, a2);
   CHECK_IF (vec_all_eq (addi, k));
   CHECK_IF (vec_all_ge (addi, k));
@@ -40,7 +66,27 @@ int main ()
   CHECK_IF (!vec_any_lt (addi, k));
   CHECK_IF (!vec_any_gt (addi, k));
 
+  ssiz = vec_avg (ssia, ssib);
+  ssuz = vec_avg (ssua, ssub);
   k = vec_avg (a1, a2);
+  scz = vec_avg (sca, scb);
+
+  for (i=0; i< 16; i++)
+    if (scz[i] != sc_expected[i])
+      abort ();
+  
+  ucz = vec_avg (uca, ucb);
+
+  for (i=0; i<16; i++)
+    if (ucz[i] != uc_expected[i])
+      abort ();
+  
+  uiz = vec_avg (uia, uib);
+
+  for (i=0; i< 4; i++)
+    if (uiz[i] != ui_expected[i])
+      abort ();
+  
   CHECK_IF (vec_all_eq (k, avgi));
 
   h = vec_add (f1, f2);
diff --git a/gcc/testsuite/gcc.target/powerpc/builtins-1-be.c b/gcc/testsuite/gcc.target/powerpc/builtins-1-be.c
new file mode 100644
index 0000000..f6db3c2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/builtins-1-be.c
@@ -0,0 +1,70 @@
+/* { dg-do compile { target { powerpc64-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+/* { dg-options "-mcpu=power8 -O0" } */
+
+/* Test that a number of newly added builtin overloads are accepted
+   by the compiler.  */
+
+/* Expected results for Big Endian:
+   vec_all_eq          vcmpequd.
+   vec_all_ne          vcmpequd.
+   vec_any_eq          vcmpequd.
+   vec_any_ne          vcmpequd.
+   vec_all_gt          vcmpgtud.
+   vec_all_le          vcmpgtud.
+   vec_any_gt          vcmpgtud.
+   vec_any_lt          vcmpgtud.
+   vec_any_le          vcmpgtud.
+   vec_and             xxland
+   vec_andc            xxlandc
+   vec_cntlz           vclzd, vclzb, vclzw, vclzh
+   xvcpsgnsp  vec_cpsgn
+   vec_ctf    xvmuldp 
+   vec_cts xvcvdpsxds, vctsxs
+   vec_ctu   xvcvdpuxds, vctuxs
+   vec_div   divd, divdu
+   vec_mergel vmrghb, vmrghh, xxmrghw
+   vec_mergeh  xxmrglw, vmrglh
+   vec_mul mulld
+   vec_nor xxlnor
+   vec_or xxlor
+   vec_packsu vpksdus
+   vec_perm vperm
+   vec_round xvrdpi
+   vec_sel xxsel
+   vec_xor xxlxor 
+   vec_rsqrt  xvrsqrtesp
+   vec_rsqrte xvrsqrtesp  */
+
+/* { dg-final { scan-assembler-times "vcmpequd." 4 } } */
+/* { dg-final { scan-assembler-times "vcmpgtud." 8 } } */
+/* { dg-final { scan-assembler-times "xxland" 29 } } */
+/* { dg-final { scan-assembler-times "vclzb" 2 } } */
+/* { dg-final { scan-assembler-times "vclzb" 2 } } */
+/* { dg-final { scan-assembler-times "vclzw" 2 } } */
+/* { dg-final { scan-assembler-times "vclzh" 2 } } */
+/* { dg-final { scan-assembler-times "xvcpsgnsp" 1 } } */
+/* { dg-final { scan-assembler-times "xvmuldp" 6 } } */
+/* { dg-final { scan-assembler-times "xvcvdpsxds" 1 } } */
+/* { dg-final { scan-assembler-times "vctsxs" 1 } } */
+/* { dg-final { scan-assembler-times "xvcvdpuxds" 1 } } */
+/* { dg-final { scan-assembler-times "vctuxs" 1 } } */
+/* { dg-final { scan-assembler-times "divd" 4 } } */
+/* { dg-final { scan-assembler-times "divdu" 2 } } */
+/* { dg-final { scan-assembler-times "vmrghb" 0 } } */
+/* { dg-final { scan-assembler-times "vmrghh" 3 } } */
+/* { dg-final { scan-assembler-times "xxmrghw" 1 } } */
+/* { dg-final { scan-assembler-times "xxmrglw" 4 } } */
+/* { dg-final { scan-assembler-times "vmrglh" 4 } } */
+/* { dg-final { scan-assembler-times "mulld" 4 } } */
+/* { dg-final { scan-assembler-times "xxlnor" 19 } } */
+/* { dg-final { scan-assembler-times "xxlor" 14 } } */
+/* { dg-final { scan-assembler-times "vpksdus" 1 } } */
+/* { dg-final { scan-assembler-times "vperm" 2 } } */
+/* { dg-final { scan-assembler-times "xvrdpi" 1 } } */
+/* { dg-final { scan-assembler-times "xxsel" 6 } } */
+/* { dg-final { scan-assembler-times "xxlxor" 6 } } */
+
+/* The source code for the test is in builtins-1.h.  */
+#include "builtins-1.h"
+
diff --git a/gcc/testsuite/gcc.target/powerpc/builtins-1-le.c b/gcc/testsuite/gcc.target/powerpc/builtins-1-le.c
new file mode 100644
index 0000000..8763c68
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/builtins-1-le.c
@@ -0,0 +1,69 @@
+/* { dg-do compile { target { powerpc64le-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+/* { dg-options "-mcpu=power8 -O0" } */
+
+/* Test that a number of newly added builtin overloads are accepted
+   by the compiler.  */
+
+/* Expected results for Little Endian:
+   vec_all_eq          vcmpequd.
+   vec_all_ne          vcmpequd.
+   vec_any_eq          vcmpequd.
+   vec_any_ne          vcmpequd.
+   vec_all_gt          vcmpgtud.
+   vec_all_le          vcmpgtud.
+   vec_any_gt          vcmpgtud.
+   vec_any_lt          vcmpgtud.
+   vec_any_le          vcmpgtud.
+   vec_and             xxland
+   vec_andc            xxlandc
+   vec_cntlz           vclzd, vclzb, vclzw, vclzh
+   xvcpsgnsp  vec_cpsgn
+   vec_ctf    xvmuldp 
+   vec_cts xvcvdpsxds, vctsxs
+   vec_ctu   xvcvdpuxds, vctuxs
+   vec_div   divd, divdu
+   vec_mergel vmrghb, vmrghh, xxmrghw
+   vec_mergeh  xxmrglw, vmrglh
+   vec_mul mulld
+   vec_nor xxlnor
+   vec_or xxlor
+   vec_packsu vpksdus
+   vec_perm vperm
+   vec_round xvrdpi
+   vec_sel xxsel
+   vec_xor xxlxor 
+   vec_rsqrt  xvrsqrtesp
+   vec_rsqrte xvrsqrtesp  */
+
+/* { dg-final { scan-assembler-times "vcmpequd." 4 } } */
+/* { dg-final { scan-assembler-times "vcmpgtud." 8 } } */
+/* { dg-final { scan-assembler-times "xxland" 29 } } */
+/* { dg-final { scan-assembler-times "vclzb" 2 } } */
+/* { dg-final { scan-assembler-times "vclzb" 2 } } */
+/* { dg-final { scan-assembler-times "vclzw" 2 } } */
+/* { dg-final { scan-assembler-times "vclzh" 2 } } */
+/* { dg-final { scan-assembler-times "xvcpsgnsp" 1 } } */
+/* { dg-final { scan-assembler-times "xvmuldp" 6 } } */
+/* { dg-final { scan-assembler-times "xvcvdpsxds" 1 } } */
+/* { dg-final { scan-assembler-times "vctsxs" 1 } } */
+/* { dg-final { scan-assembler-times "xvcvdpuxds" 1 } } */
+/* { dg-final { scan-assembler-times "vctuxs" 1 } } */
+/* { dg-final { scan-assembler-times "divd" 4 } } */
+/* { dg-final { scan-assembler-times "divdu" 2 } } */
+/* { dg-final { scan-assembler-times "vmrghb" 3 } } */
+/* { dg-final { scan-assembler-times "vmrghh" 4 } } */
+/* { dg-final { scan-assembler-times "xxmrghw" 4 } } */
+/* { dg-final { scan-assembler-times "xxmrglw" 1 } } */
+/* { dg-final { scan-assembler-times "vmrglh" 3 } } */
+/* { dg-final { scan-assembler-times "mulld" 4 } } */
+/* { dg-final { scan-assembler-times "xxlnor" 19 } } */
+/* { dg-final { scan-assembler-times "xxlor" 14 } } */
+/* { dg-final { scan-assembler-times "vpksdus" 1 } } */
+/* { dg-final { scan-assembler-times "vperm" 2 } } */
+/* { dg-final { scan-assembler-times "xvrdpi" 1 } } */
+/* { dg-final { scan-assembler-times "xxsel" 6 } } */
+/* { dg-final { scan-assembler-times "xxlxor" 6 } } */
+
+/* The test code is in builtins -1.h.  */
+#include "builtins-1.h"
diff --git a/gcc/testsuite/gcc.target/powerpc/builtins-1.c b/gcc/testsuite/gcc.target/powerpc/builtins-1.h
index 8d0b7c9..89efedb 100644
--- a/gcc/testsuite/gcc.target/powerpc/builtins-1.c
+++ b/gcc/testsuite/gcc.target/powerpc/builtins-1.h
@@ -1,10 +1,6 @@
-/* { dg-do compile { target { powerpc64le-*-* } } } */
-/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
-/* { dg-options "-mcpu=power8 -O0" } */
-
-/* Test that a number of newly added builtin overloads are accepted
-   by the compiler.  */
-
+/* This test is included into builtins-1-be.c and builtins-1-le.c to test on
+   Big Endian and Little Endian machines.  */
+   
 #include <altivec.h>
 
 vector double y = { 2.0, 4.0 };
@@ -14,7 +10,14 @@ int main ()
 {
   vector float fa = {1.0, 2.0, 3.0, -4.0};
   vector float fb = {-2.0, -3.0, -4.0, -5.0};
+  vector float fd = vec_and (fa, fb);
   vector float fc = vec_cpsgn (fa, fb);
+  vector float fe = vec_mergeh (fa, fb);
+  vector float ff = vec_mergel (fa, fb);
+	  
+  vector double da = {1.0, 2.0};
+  vector double db = {-2.0, -3.0};
+  vector double dz = vec_and (da, db);
 
   vector long long la = {5L, 14L};
   vector long long lb = {3L, 86L};
@@ -33,14 +36,16 @@ int main ()
   vector long long lg = vec_andc (la, lb);
   vector long long lh = vec_andc (la, ld);
   vector long long li = vec_andc (ld, lb);
-
+  
   vector unsigned long long ug = vec_andc (ua, ub);
   vector unsigned long long uh = vec_andc (ua, ud);
   vector unsigned long long ui = vec_andc (ud, ub);
 
-  vector double da = {1.0, -4.0};
-  vector double db = {-2.0, 5.0};
-  vector double dc = vec_cpsgn (da, db);
+  vector double de = {1.0, -4.0};
+  vector double df = {-2.0, 5.0};
+  vector double dg = vec_cpsgn (de, df);
+  vector double dzw = vec_mergeh (de, df);
+  vector double dze = vec_mergel (de, df);
 
   vector long long lj = vec_mergeh (la, lb);
   vector long long lk = vec_mergeh (la, ld);
@@ -50,6 +55,11 @@ int main ()
   vector unsigned long long uk = vec_mergeh (ua, ud);
   vector unsigned long long ul = vec_mergeh (ud, ua);
 
+  vector pixel pa = {9, 16, 25, 36, 1, 2, 3, 4};
+  vector pixel pb = {25, 36, 1, 2, 45, 3, 4, 99};
+  vector pixel pc = vec_mergeh (pa, pb);
+  vector pixel pd = vec_mergel (pa, pb);
+
   vector long long lm = vec_mergel (la, lb);
   vector long long ln = vec_mergel (la, ld);
   vector long long lo = vec_mergel (ld, la);
@@ -75,7 +85,14 @@ int main ()
   vector unsigned long long uu = vec_or (ud, ua);
 
   vector unsigned char ca = {0,4,8,1,5,9,2,6,10,3,7,11,15,12,14,13};
+  vector unsigned char cbb = {5,4,8,3,1,9,2,6,10,3,7,11,15,12,14,13};
+
   vector long long lv = vec_perm (la, lb, ca);
+
+  vector unsigned char  ucm = vec_and (ca, cbb);
+  vector unsigned char  ucn = vec_andc (ca, cbb);
+  vector unsigned char  uco = vec_mergel (ca, cbb);
+
   vector unsigned long long uv = vec_perm (ua, ub, ca);
 
   vector long long lw = vec_sel (la, lb, lc);
@@ -108,20 +125,41 @@ int main ()
   int il = vec_any_lt (ua, ub);
   int im = vec_any_ne (ua, ub);
 
+  vector short ssa = {9, 16, 25, 36, 1, 2, 3, 4};
+  vector short ssb = {-8, -27, -64, -125, 2, 3, 5, 3};
+  vector short sscc = vec_and (ssa, ssb);
+  vector short sscd = vec_mergeh (ssa, ssb);
+  vector short ssce = vec_mergel (ssa, ssb);
+
   vector int sia = {9, 16, 25, 36};
   vector int sib = {-8, -27, -64, -125};
-  vector int sic = vec_mergee (sia, sib);
-  vector int sid = vec_mergeo (sia, sib);
+  vector int sicc = vec_and (sia, sib);
+  vector int sicd = vec_andc (sia, sib);
+  vector int sig = vec_mergel (sia, sib);
 
   vector unsigned int uia = {9, 16, 25, 36};
   vector unsigned int uib = {8, 27, 64, 125};
-  vector unsigned int uic = vec_mergee (uia, uib);
-  vector unsigned int uid = vec_mergeo (uia, uib);
+  vector unsigned int uicc = vec_and (uia, uib);
+  vector unsigned int uidd = vec_andc (uia, uib);
+  vector unsigned int uig = vec_mergel (uia, uib);
+
+  vector bool char bca = {0, 1, 4, 7};
+  vector bool char bcb = {-8, 9, 2, 9};
+  vector bool char bcc = vec_and (bca, bcb);
+  vector bool char bcd = vec_andc (bca, bcb);
+  vector bool char bce = vec_mergel (bca, bcb);
+
+  vector bool short bsa = {0, -1, -1, 0, 3, 4, 6, 7};
+  vector bool short bsb = {-1, -1, 0, -1, 0, 0, 0, 0};
+  vector bool short bscc = vec_and (bsa, bsb);
+  vector bool short bscd = vec_andc (bsa, bsb);
+  vector bool short bsce = vec_mergel (bsa, bsb);
 
   vector bool int bia = {0, -1, -1, 0};
   vector bool int bib = {-1, -1, 0, -1};
-  vector bool int bic = vec_mergee (bia, bib);
-  vector bool int bid = vec_mergeo (bia, bib);
+  vector bool int bicc = vec_and (bia, bib);
+  vector bool int bicd = vec_andc (bia, bib);
+  vector bool int bide = vec_mergel (bia, bib);
 
   vector unsigned int uie = vec_packsu (ua, ub);
 
@@ -129,22 +167,32 @@ int main ()
   vector unsigned long long u2 = vec_cntlz (ua);
   vector int sie = vec_cntlz (sia);
   vector unsigned int uif = vec_cntlz (uia);
-  vector short ssa = {20, -40, -60, 80, 100, -120, -140, 160};
-  vector short ssb = vec_cntlz (ssa);
+  vector short sszz = vec_cntlz (ssa);
+
   vector unsigned short usa = {81, 72, 63, 54, 45, 36, 27, 18};
-  vector unsigned short usb = vec_cntlz (usa);
+  vector unsigned short usb = {81, 72, 63, 54, 45, 36, 27, 18};
+  vector unsigned short usd = vec_and (usa, usb);
+  vector unsigned short use = vec_andc (usa, usb);
+  vector unsigned short usc = vec_cntlz (usa);
+  vector unsigned short uscd = vec_mergeh (usa, usb);
+  vector unsigned short usce = vec_mergel (usa, usb);
+  
   vector signed char sca = {-4, 3, -9, 15, -31, 31, 0, 0,
 		            1, 117, -36, 99, 98, 97, 96, 95};
   vector signed char scb = vec_cntlz (sca);
+  vector signed char scc = vec_mergel (sca, scb);
+
   vector unsigned char cb = vec_cntlz (ca);
 
   vector double dd = vec_xl (0, &y);
   vec_xst (dd, 0, &z);
 
-  vector double de = vec_round (dd);
+  vector double dzz = vec_round (dd);
+  vector double dzz1 = vec_rsqrt (dd);
+  vector double dzz2 = vec_rsqrte (dd);
 
-  vector double df = vec_splat (de, 0);
-  vector double dg = vec_splat (de, 1);
+  vector double dff = vec_splat (de, 0);
+  vector double dgg = vec_splat (de, 1);
   vector long long l3 = vec_splat (l2, 0);
   vector long long l4 = vec_splat (l2, 1);
   vector unsigned long long u3 = vec_splat (u2, 0);
@@ -160,8 +208,10 @@ int main ()
 
   vector double dh = vec_ctf (la, -2);
   vector double di = vec_ctf (ua, 2);
+  vector int sz = vec_cts (fa, 0x1F);
   vector long long l9 = vec_cts (dh, -2);
   vector unsigned long long u7 = vec_ctu (di, 2);
+  vector unsigned int usz = vec_ctu (fa, 0x1F);
 
   return 0;
 }
diff --git a/gcc/testsuite/gcc.target/powerpc/builtins-2.c b/gcc/testsuite/gcc.target/powerpc/builtins-2.c
index 8f1e9cd..666e967 100644
--- a/gcc/testsuite/gcc.target/powerpc/builtins-2.c
+++ b/gcc/testsuite/gcc.target/powerpc/builtins-2.c
@@ -1,13 +1,20 @@
-/* { dg-do run { target { powerpc64le-*-* } } } */
+/* { dg-do run { target { powerpc*-*-* } } } */
 /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
 /* { dg-options "-mcpu=power8 " } */
 
 #include <altivec.h>
 
+#ifdef DEBUG 
+#include <stdio.h>
+#endif
+
 void abort (void);
 
 int main ()
 {
+  vector int inta = {27, -1, 4, 9};
+  vector unsigned int uinta = {9, 0, 7, 222};
+
   vector long long sa = {27L, -14L};
   vector long long sb = {-9L, -2L};
 
@@ -44,5 +51,42 @@ int main ()
       || sg[0] != 27L || sg[1] != -14L || ug[0] != 27L || ug[1] != 14L)
     abort ();
 
+  vector float fa = vec_ctf (inta, 5);
+  if (fa[0] != 0.843750 || fa[1] != -0.031250 || fa[2] != 0.125000 || fa[3] != 0.281250)
+#ifdef DEBUG
+    printf("fa[0] = %f, fa[1] = %f, fa[2] = %f, fa[3] = %f\n",
+           fa[0], fa[1], fa[2], fa[3]);
+#else  
+    abort ();
+#endif
+
+  vector int sa2 = vec_cts (fa, 5);
+  if (sa2[0] != 27 || sa2[1] != -1 || sa2[2] != 4 || sa2[3] != 9)
+#ifdef DEBUG
+    printf("sa2[0] = %d, sa2[1] = %d, sa2[2] = %d, sa2[3] = %d\n",
+           sa2[0], sa2[1], sa2[2], sa2[3]);
+#else  
+    abort ();
+#endif
+     
+  vector float fb = vec_ctf (uinta, 2);
+
+  if (fb[0] != 2.250000 || fb[1] != 0.0 || fb[2] != 1.750000 || fb[3] != 55.500000)
+#ifdef DEBUG
+    printf("fb[0] = %f, fb[1] = %f, fb[2] = %f, fb[3] = %f\n",
+		 fb[0], fb[1], fb[2], fb[3]);
+#else  
+    abort ();
+#endif
+
+  vector unsigned int ua2 = vec_ctu (fb, 2);
+  if (ua2[0] != 9 || ua2[1] != 0 || ua2[2] != 7 || ua2[3] != 222)
+#ifdef DEBUG
+    printf("ua2[0] = %d, ua2[1] = %d, ua2[2] = %d, ua2[3] = %d\n",
+           ua2[0], ua2[1], ua2[2], ua2[3]);
+#else  
+    abort ();
+#endif
+     
   return 0;
 }
diff --git a/gcc/testsuite/gcc.target/powerpc/builtins-3-runnable.c b/gcc/testsuite/gcc.target/powerpc/builtins-3-runnable.c
index 17bb9b3..21535b3 100644
--- a/gcc/testsuite/gcc.target/powerpc/builtins-3-runnable.c
+++ b/gcc/testsuite/gcc.target/powerpc/builtins-3-runnable.c
@@ -1,7 +1,7 @@
 /* { dg-do run { target { powerpc*-*-linux* } } } */
 /* { dg-require-effective-target vsx_hw } */
 /* { dg-options "-O2 -mvsx -mcpu=power8" } */
-/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=power8" } } */
 
 #include <altivec.h> // vector
 
@@ -139,7 +139,7 @@ void test_result_sp(int check, vector float vec_result,
 		if (vec_result[i] != vec_expected[i]) {
 #ifdef DEBUG
 			printf("Test_result_sp: ");
-			printf("vec_result[%d] (%lld) != vec_expected[%d] (%lld)\n",
+			printf("vec_result[%d] (%f) != vec_expected[%d] (%f)\n",
 			       i, vec_result[i], i, vec_expected[i]);
 #else
 			abort();
@@ -153,7 +153,7 @@ void test_result_dp(vector double vec_result, vector double vec_expected)
 	if (vec_result[0] != vec_expected[0]) {
 #ifdef DEBUG
 		printf("Test_result_dp: ");
-		printf("vec_result[0] (%lld) != vec_expected[0] (%lld)\n",
+		printf("vec_result[0] (%f) != vec_expected[0] (%f)\n",
 		       vec_result[0], vec_expected[0]);
 #else
 		abort();
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-minmax-char.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-minmax-char.c
index 9df6ecd..6c412a4 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-minmax-char.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-minmax-char.c
@@ -20,18 +20,36 @@ test6_min (vector unsigned char x, vector unsigned char y)
 }
 
 vector signed char
-test3_max (vector signed char x, vector signed char y)
+test1_min (vector bool char x, vector signed char y)
+{
+  return vec_min (x, y);
+}
+
+vector unsigned char
+test2_min (vector bool char x, vector unsigned char y)
+{
+  return vec_min (x, y);
+}
+
+vector unsigned char
+test4_min (vector unsigned char x, vector bool char y)
+{
+  return vec_min (x, y);
+}
+
+vector signed char
+test1_max (vector signed char x, vector signed char y)
 {
   return vec_max (x, y);
 }
 
 vector unsigned char
-test6_max (vector unsigned char x, vector unsigned char y)
+test2_max (vector unsigned char x, vector unsigned char y)
 {
   return vec_max (x, y);
 }
 
-/* { dg-final { scan-assembler-times "vminsb" 1 } } */
+/* { dg-final { scan-assembler-times "vminsb" 2 } } */
 /* { dg-final { scan-assembler-times "vmaxsb" 1 } } */
-/* { dg-final { scan-assembler-times "vminub" 1 } } */
+/* { dg-final { scan-assembler-times "vminub" 3 } } */
 /* { dg-final { scan-assembler-times "vmaxub" 1 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-minmax-int.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-minmax-int.c
index 1ce1c2b..0dea882 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-minmax-int.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-minmax-int.c
@@ -31,7 +31,31 @@ test6_max (vector unsigned int x, vector unsigned int y)
   return vec_max (x, y);
 }
 
-/* { dg-final { scan-assembler-times "vminsw" 1 } } */
+vector signed int
+test4_min (vector bool int x, vector signed int y)
+{
+  return vec_min (x, y);
+}
+
+vector signed int
+test5_min (vector signed int x, vector bool int y)
+{
+  return vec_min (x, y);
+}
+
+vector unsigned int
+test7_min (vector bool int x, vector unsigned int y)
+{
+  return vec_min (x, y);
+}
+
+vector unsigned int
+test8_min (vector unsigned int x, vector bool int y)
+{
+  return vec_min (x, y);
+}
+
+/* { dg-final { scan-assembler-times "vminsw" 3 } } */
 /* { dg-final { scan-assembler-times "vmaxsw" 1 } } */
-/* { dg-final { scan-assembler-times "vminuw" 1 } } */
+/* { dg-final { scan-assembler-times "vminuw" 3 } } */
 /* { dg-final { scan-assembler-times "vmaxuw" 1 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-minmax-longlong.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-minmax-longlong.c
index ed9c66d..234d078 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-minmax-longlong.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-minmax-longlong.c
@@ -31,7 +31,31 @@ test6_max (vector unsigned long long x, vector unsigned long long y)
   return vec_max (x, y);
 }
 
+vector signed long long
+test7_max (vector signed long long x, vector long long bool y)
+{
+  return vec_max (x, y);
+}
+
+vector signed long long
+test8_max (vector long long bool x, vector signed long long y)
+{
+  return vec_max (x, y);
+}
+
+vector unsigned long long
+test9_max (vector unsigned long long x, vector long long bool y)
+{
+  return vec_max (x, y);
+}
+
+vector unsigned long long
+test10_max (vector long long bool x, vector unsigned long long y)
+{
+  return vec_max (x, y);
+}
+
 /* { dg-final { scan-assembler-times "vminsd" 1 } } */
-/* { dg-final { scan-assembler-times "vmaxsd" 1 } } */
+/* { dg-final { scan-assembler-times "vmaxsd" 3 } } */
 /* { dg-final { scan-assembler-times "vminud" 1 } } */
-/* { dg-final { scan-assembler-times "vmaxud" 1 } } */
+/* { dg-final { scan-assembler-times "vmaxud" 3 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-minmax-short.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-minmax-short.c
index fa608c9..02d12aa 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-minmax-short.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-minmax-short.c
@@ -31,7 +31,31 @@ test6_max (vector unsigned short x, vector unsigned short y)
   return vec_max (x, y);
 }
 
-/* { dg-final { scan-assembler-times "vminsh" 1 } } */
+vector unsigned short
+test4_min (vector bool short x, vector unsigned short y)
+{
+  return vec_min (x, y);
+}
+
+vector unsigned short
+test5_min (vector unsigned short x, vector bool short y)
+{
+  return vec_min (x, y);
+}
+
+vector signed short
+test7_min (vector bool short x, vector signed short y)
+{
+  return vec_min (x, y);
+}
+
+vector signed short
+test8_min (vector signed short x, vector bool short y)
+{
+  return vec_min (x, y);
+}
+
+/* { dg-final { scan-assembler-times "vminsh" 3 } } */
 /* { dg-final { scan-assembler-times "vmaxsh" 1 } } */
-/* { dg-final { scan-assembler-times "vminuh" 1 } } */
+/* { dg-final { scan-assembler-times "vminuh" 3 } } */
 /* { dg-final { scan-assembler-times "vmaxuh" 1 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-8.c b/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-8.c
index 4b0370b..0cfbe68 100644
--- a/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-8.c
+++ b/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-8.c
@@ -7,7 +7,9 @@
 
 /* Test POWER8 vector built-ins added for version 1.1 of ELFv2 ABI.  */
 
+vector signed char        vsca, vscb, vscc;
 vector unsigned char      vuca, vucb, vucc;
+vector signed short       vssa, vssb;
 vector bool     char      vbca, vbcb;
 vector unsigned short     vusa, vusb;
 vector bool     short     vbsa, vbsb;
@@ -21,8 +23,10 @@ vector signed   __int128  vsxa, vsxb, vsxc;
 vector unsigned __int128  vuxa, vuxb, vuxc;
 vector          double    vda,  vdb;
 
-void foo (vector unsigned char *vucr,
+void foo (vector signed char *vscr,
+	  vector unsigned char *vucr,
 	  vector bool char *vbcr,
+	  vector signed short *vssr,
 	  vector unsigned short *vusr,
 	  vector bool short *vbsr,
 	  vector signed int *vsir,
@@ -46,6 +50,24 @@ void foo (vector unsigned char *vucr,
   *vuir++ = vec_addec (vuia, vuib, vuic);
   *vsxr++ = vec_addec (vsxa, vsxb, vsxc);
   *vuxr++ = vec_addec (vuxa, vuxb, vuxc);
+  *vscr++ = vec_adds (vsca, vscb);
+  *vucr++ = vec_adds (vuca, vucb);
+  *vsir++ = vec_adds (vsia, vsib);
+  *vuir++ = vec_adds (vuia, vuib);
+  *vssr++ = vec_adds (vssa, vssb);
+  *vusr++ = vec_adds (vusa, vusb);
+  *vscr++ = vec_adds (vbca, vscb);
+  *vscr++ = vec_adds (vsca, vbcb);
+  *vucr++ = vec_adds (vbca, vucb);
+  *vucr++ = vec_adds (vuca, vbcb);
+  *vsir++ = vec_adds (vbia, vsib);
+  *vsir++ = vec_adds (vsia, vbib);
+  *vuir++ = vec_adds (vbia, vuib);
+  *vuir++ = vec_adds (vuia, vbib);
+  *vssr++ = vec_adds (vbsa, vssb);
+  *vssr++ = vec_adds (vssa, vbsb);
+  *vusr++ = vec_adds (vbsa, vusb);
+  *vusr++ = vec_adds (vusa, vbsb);
   *vucr++ = vec_bperm (vuca, vucb);
   *vulr++ = vec_bperm (vuxa, vucb);
   *vbcr++ = vec_eqv (vbca, vbcb);
@@ -80,6 +102,17 @@ void foo (vector unsigned char *vucr,
   *vuir++ = vec_subec (vuia, vuib, vuic);
   *vsxr++ = vec_subec (vsxa, vsxb, vsxc);
   *vuxr++ = vec_subec (vuxa, vuxb, vuxc);
+  *vscr++ = vec_subs (vsca, vscb);
+  *vucr++ = vec_subs (vuca, vucb);
+  *vsir++ = vec_subs (vsia, vsib);
+  *vuir++ = vec_subs (vuia, vuib);
+  *vssr++ = vec_subs (vssa, vssb);
+  *vusr++ = vec_subs (vusa, vusb);
+  *vsir++ = vec_sum2s (vsia, vsib);
+  *vsir++ = vec_sum4s (vsca, vsib);
+  *vsir++ = vec_sum4s (vssa, vsib);
+  *vuir++ = vec_sum4s (vuca, vuib);
+
 }
 
 /* { dg-final { scan-assembler-times "vaddcuq" 2 } } */
@@ -104,4 +137,14 @@ void foo (vector unsigned char *vucr,
 /* { dg-final { scan-assembler-times "vpmsumd" 1 } } */
 /* { dg-final { scan-assembler-times "vshasigmaw" 1 } } */
 /* { dg-final { scan-assembler-times "vshasigmad" 1 } } */
+/* { dg-final { scan-assembler-times "vsubsbs" 1 } }   vec_subs */
+/* { dg-final { scan-assembler-times "vsububs" 1 } }   vec_subs */
+/* { dg-final { scan-assembler-times "vsubsws" 1 } }   vec_subs */
+/* { dg-final { scan-assembler-times "vsubuws" 1 } }   vec_subs */
+/* { dg-final { scan-assembler-times "vsubshs" 1 } }   vec_subs */
+/* { dg-final { scan-assembler-times "vsubuhs" 1 } }   vec_subs */
+/* { dg-final { scan-assembler-times "vsum2sws" 1 } }  vec_sum2s */
+/* { dg-final { scan-assembler-times "vsum4sws" 0 } }  vec_sum4s */
+/* { dg-final { scan-assembler-times "vsum4shs" 1 } }  vec_sum4s */
+/* { dg-final { scan-assembler-times "vsum4ubs" 1 } }  vec_sum4s */
 
diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-vector-5.c b/gcc/testsuite/gcc.target/powerpc/vsx-vector-5.c
index 6566503..3e2068b 100644
--- a/gcc/testsuite/gcc.target/powerpc/vsx-vector-5.c
+++ b/gcc/testsuite/gcc.target/powerpc/vsx-vector-5.c
@@ -1,4 +1,4 @@
-/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */
+/* { dg-do run { target { powerpc*-*-* && lp64 } } } */
 /* { dg-skip-if "" { powerpc*-*-darwin* } } */
 /* { dg-require-effective-target powerpc_vsx_ok } */
 /* { dg-options "-mvsx -O2" } */
@@ -15,18 +15,23 @@
 static int errors = 0;
 #endif
 
-union args {
+union args_d {
   double scalar[2];
   vector double vect;
 };
 
+union args_f {
+  float scalar[4];
+  vector float vect;
+};
+
 union largs {
   unsigned long scalar[2];
   vector bool long vect;
 };
 
 static void
-do_test (union args *expected, union args *got, const char *name)
+do_test_d (union args_d *expected, union args_d *got, const char *name)
 {
   if (expected->scalar[0] != got->scalar[0]
       || expected->scalar[1] != got->scalar[1])
@@ -41,6 +46,23 @@ do_test (union args *expected, union args *got, const char *name)
 }
 
 static void
+do_test_f (union args_f *expected, union args_f *got, const char *name)
+{
+  if (expected->scalar[0] != got->scalar[0]
+      || expected->scalar[1] != got->scalar[1]
+      || expected->scalar[2] != got->scalar[2]
+      || expected->scalar[3] != got->scalar[3])
+    {
+#ifdef DEBUG
+      printf ("%s failed!\n", name);
+      errors++;
+#else
+      abort ();
+#endif
+    }
+}
+
+static void
 do_ltest (union largs *expected, union largs *got, const char *name)
 {
   if (expected->scalar[0] != got->scalar[0]
@@ -64,19 +86,37 @@ vabs (vector double arg)
 }
 
 static vector double
-vceil (vector double arg)
+vceil_d (vector double arg)
+{
+  return vec_ceil (arg);
+}
+
+static vector float
+vceil_f (vector float arg)
 {
   return vec_ceil (arg);
 }
 
 static vector double
-vfloor (vector double arg)
+vfloor_d (vector double arg)
+{
+  return vec_floor (arg);
+}
+
+static vector float
+vfloor_f (vector float arg)
 {
   return vec_floor (arg);
 }
 
 static vector double
-vnearbyint (vector double arg)
+vnearbyint_d (vector double arg)
+{
+  return vec_nearbyint (arg);
+}
+
+static vector float
+vnearbyint_f (vector float arg)
 {
   return vec_nearbyint (arg);
 }
@@ -87,64 +127,127 @@ vrint (vector double arg)
   return vec_rint (arg);
 }
 
+static vector float
+vsqrt_f (vector float arg)
+{
+  return vec_sqrt (arg);
+}
+
 static vector double
-vsqrt (vector double arg)
+vsqrt_d (vector double arg)
 {
   return vec_sqrt (arg);
 }
 
-/* Single argument tests.  */
+/* Single argument tests with double args  */
 static struct
 {
-  union args result;
-  union args input;
+  union args_d result;
+  union args_d input;
   vector double (*func) (vector double);
   const char *name;
-} arg1_tests[] = {
+} arg1_tests_d[] = {
   /* result		input			function	name */
   { {  1.0,  2.0 },	{ -1.0,  2.0 },		vabs,		"vabs" },
   { {  1.0,  2.0 },	{  1.0, -2.0 },		vabs,		"vabs" },
-  { {  2.0,  2.0 },	{  1.1,  1.7 },		vceil,		"vceil" },
-  { { -1.0, -1.0 },	{ -1.1, -1.7 },		vceil,		"vceil" },
-  { { -1.0,  2.0 },	{ -1.5,  1.5 },		vceil,		"vceil" },
-  { {  1.0,  1.0 },	{  1.1,  1.7 },		vfloor,		"vfloor" },
-  { { -2.0, -2.0 },	{ -1.1, -1.7 },		vfloor,		"vfloor" },
-  { { -2.0,  1.0 },	{ -1.5,  1.5 },		vfloor,		"vfloor" },
-  { {  1.0,  2.0 },	{  1.1,  1.7 },		vnearbyint,	"vnearbyint" },
-  { { -1.0, -2.0 },	{ -1.1, -1.7 },		vnearbyint,	"vnearbyint" },
-  { { -2.0,  2.0 },	{ -1.5,  1.5 },		vnearbyint,	"vnearbyint" },
+  { {  2.0,  2.0 },	{  1.1,  1.7 },		vceil_d,	"vceil_d" },
+  { { -1.0, -1.0 },	{ -1.1, -1.7 },		vceil_d,	"vceil_d" },
+  { { -1.0,  2.0 },	{ -1.5,  1.5 },		vceil_d,	"vceil_d" },
+  { {  1.0,  1.0 },	{  1.1,  1.7 },		vfloor_d,	"vfloor_d" },
+  { { -2.0, -2.0 },	{ -1.1, -1.7 },		vfloor_d,	"vfloor_d" },
+  { { -2.0,  1.0 },	{ -1.5,  1.5 },		vfloor_d,	"vfloor_d" },
+  { {  1.0,  2.0 },	{  1.1,  1.7 },		vnearbyint_d,	"vnearbyint_d" },
+  { { -1.0, -2.0 },	{ -1.1, -1.7 },		vnearbyint_d,	"vnearbyint_d" },
+  { { -2.0,  2.0 },	{ -1.5,  1.5 },		vnearbyint_d,	"vnearbyint_d" },
   { {  1.0,  2.0 },	{  1.1,  1.7 },		vrint,		"vrint" },
   { { -1.0, -2.0 },	{ -1.1, -1.7 },		vrint,		"vrint" },
   { { -2.0,  2.0 },	{ -1.5,  1.5 },		vrint,		"vrint" },
-  { {  2.0,  4.0 },	{  4.0, 16.0 },		vsqrt,		"vsqrt" },
+
+  { {  2.0,  4.0 },	{  4.0, 16.0 },		vsqrt_d,	"vsqrt_d" },
 };
 
 static void
-test_arg1 (void)
+test_arg1_d (void)
 {
   unsigned i;
 
 #ifdef DEBUG
-  printf ("Single argument tests:\n");
+  printf ("\nSingle argument tests with double args:\n");
 #endif
 
-  for (i = 0; i < sizeof (arg1_tests) / sizeof (arg1_tests[0]); i++)
+  for (i = 0; i < sizeof (arg1_tests_d) / sizeof (arg1_tests_d[0]); i++)
     {
-      union args u;
-      u.vect = arg1_tests[i].func (arg1_tests[i].input.vect);
+      union args_d u;
+      u.vect = arg1_tests_d[i].func (arg1_tests_d[i].input.vect);
 
 #ifdef DEBUG
       printf ("test %-16s: expected { %4g, %4g }, got { %4g, %4g }, input { %4g, %4g }\n",
-	      arg1_tests[i].name,
-	      arg1_tests[i].result.scalar[0],
-	      arg1_tests[i].result.scalar[1],
+	      arg1_tests_d[i].name,
+	      arg1_tests_d[i].result.scalar[0],
+	      arg1_tests_d[i].result.scalar[1],
+	      u.scalar[0],
+	      u.scalar[1],
+	      arg1_tests_d[i].input.scalar[0],
+	      arg1_tests_d[i].input.scalar[1]);
+#endif
+
+      do_test_d (&arg1_tests_d[i].result, &u, arg1_tests_d[i].name);
+    }
+
+  return;
+}
+
+/* Single argument tests with float args.  */
+static struct
+{
+  union args_f result;
+  union args_f input;
+  vector float (*func) (vector float);
+  const char *name;
+} arg1_tests_f[] = {
+  /* result			input				function	name */
+  { { 2.0, 2.0, 3.0, 3.0 },     { 1.05, 1.1, 2.2, 2.3 },	vceil_f,	"vceil_f" },
+  { { -1.0, -1.0, -2.0, -2.0 },	{ -1.1, -1.7, -2.1, -2.4 },	vceil_f,	"vceil_f" },
+  { { 1.0, 1.0, 2.0, 2.0 },     { 1.05, 1.1, 2.2, 2.3 },	vfloor_f,	"vfloor_f" },
+  { { -2.0, -2.0, -3.0, -3.0 },	{ -1.1, -1.7, -2.1, -2.4 },	vfloor_f,	"vfloor_f" },
+  { {  1.0,  2.0, -3.0, 3.0 },	{  1.1,  1.7, -3.1, 3.1 },	vnearbyint_f,	"vnearbyint_f" },
+  { { -1.0, -2.0, -3.0, 3.0 },	{ -1.1, -1.7, -2.9, 2.9 },	vnearbyint_f,	"vnearbyint_f" },
+  { { -2.0,  2.0, -3.0, 3.0 },	{ -1.5,  1.5, -2.55, 3.49 },	vnearbyint_f,	"vnearbyint_f" },
+  { {  2.0,  4.0 },	{  4.0, 16.0 },		vsqrt_f,	"vsqrt_f" },
+};
+
+static void
+test_arg1_f (void)
+{
+  unsigned i;
+
+#ifdef DEBUG
+  printf ("\nSingle argument tests with float args:\n");
+#endif
+
+  for (i = 0; i < sizeof (arg1_tests_f) / sizeof (arg1_tests_f[0]); i++)
+    {
+      union args_f u;
+      u.vect = arg1_tests_f[i].func (arg1_tests_f[i].input.vect);
+
+#ifdef DEBUG
+      printf ("test %-16s: expected { %4g, %4g, %4g, %4g }, got { %4g, %4g, %4g, %4g }, input { %4g, %4g, %4g, %4g }\n",
+	      arg1_tests_f[i].name,
+	      arg1_tests_f[i].result.scalar[0],
+	      arg1_tests_f[i].result.scalar[1],
+	      arg1_tests_f[i].result.scalar[2],
+	      arg1_tests_f[i].result.scalar[3],
 	      u.scalar[0],
 	      u.scalar[1],
-	      arg1_tests[i].input.scalar[0],
-	      arg1_tests[i].input.scalar[1]);
+	      u.scalar[2],
+	      u.scalar[3],
+	      arg1_tests_f[i].input.scalar[0],
+	      arg1_tests_f[i].input.scalar[1],
+	      arg1_tests_f[i].input.scalar[2],
+	      arg1_tests_f[i].input.scalar[3]);
 #endif
 
-      do_test (&arg1_tests[i].result, &u, arg1_tests[i].name);
+      do_test_f (&arg1_tests_f[i].result, &u, arg1_tests_f[i].name);
     }
 
   return;
@@ -215,8 +318,8 @@ vmin (vector double arg1, vector double arg2)
 /* 2 argument tests.  */
 static struct
 {
-  union args result;
-  union args input[2];
+  union args_d result;
+  union args_d input[2];
   vector double (*func) (vector double, vector double);
   const char *name;
 } arg2_tests[] = {
@@ -250,7 +353,7 @@ test_arg2 (void)
 
   for (i = 0; i < sizeof (arg2_tests) / sizeof (arg2_tests[0]); i++)
     {
-      union args u;
+      union args_d u;
       u.vect = arg2_tests[i].func (arg2_tests[i].input[0].vect,
 				   arg2_tests[i].input[1].vect);
 
@@ -267,7 +370,7 @@ test_arg2 (void)
 	      arg2_tests[i].input[1].scalar[1]);
 #endif
 
-      do_test (&arg2_tests[i].result, &u, arg2_tests[i].name);
+      do_test_d (&arg2_tests[i].result, &u, arg2_tests[i].name);
     }
 
   return;
@@ -312,7 +415,7 @@ vcmpge (vector double arg1, vector double arg2)
 static struct
 {
   union largs result;
-  union args input[2];
+  union args_d input[2];
   vector bool long (*func) (vector double, vector double);
   const char *name;
 } argcmp_tests[] = {
@@ -374,7 +477,8 @@ test_argcmp (void)
 int
 main (int argc, char *argv[])
 {
-  test_arg1 ();
+  test_arg1_f ();
+  test_arg1_d ();
   test_arg2 ();
   test_argcmp ();
 
diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-vector-7.c b/gcc/testsuite/gcc.target/powerpc/vsx-vector-7.c
index 66880fd..7de4172 100644
--- a/gcc/testsuite/gcc.target/powerpc/vsx-vector-7.c
+++ b/gcc/testsuite/gcc.target/powerpc/vsx-vector-7.c
@@ -8,10 +8,12 @@
 
 vector bool     long long vbla, vblb, vblc;
 vector signed   long long vsla;
-vector unsigned long long vula, vulc;
+vector unsigned long long vula, vulb, vulc;
+vector double vda, vdb;
+vector float vfa, vfb;
 
 void foo (vector bool long long *vblr,
-	  vector double *vdr)
+	  vector double *vdr, vector unsigned long long *vulz, vector double *vdz)
 {
   *vblr++ = vec_andc (vbla, vblb);
   *vdr++  = vec_double (vsla);
@@ -23,6 +25,10 @@ void foo (vector bool long long *vblr,
   *vblr++ = vec_sel (vbla, vblb, vblc);
   *vblr++ = vec_sel (vbla, vblb, vulc);
   *vblr++ = vec_xor (vbla, vblb);
+
+  *vulz++ = vec_sel (vula, vulb, vblc);
+
+  *vdz++ = vec_sel(vda, vdb, vulc);
 }
 
 /* { dg-final { scan-assembler-times "xxlandc" 1 } } */
@@ -32,5 +38,5 @@ void foo (vector bool long long *vblr,
 /* { dg-final { scan-assembler-times "xxpermdi .*,.*,.*,0" 1 } } */
 /* { dg-final { scan-assembler-times "xxlnor" 1 } } */
 /* { dg-final { scan-assembler-times "xxlor" 1 } } */
-/* { dg-final { scan-assembler-times "xxsel" 2 } } */
+/* { dg-final { scan-assembler-times "xxsel" 4 } } */
 /* { dg-final { scan-assembler-times "xxlxor" 1 } } */