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author | Andrey Turetskiy <andrey.turetskiy@gmail.com> | 2012-11-20 11:05:10 +0000 |
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committer | Kirill Yukhin <kyukhin@gcc.gnu.org> | 2012-11-20 11:05:10 +0000 |
commit | e7d8fc6c1069d17cba2e0fb4ab6ec69b50273f08 (patch) | |
tree | a39f82e8231f3d0ad69cadd246943e2047e3bfda /gcc | |
parent | c5c18dd18fdd626700b17b3673a748c27c4bdf1b (diff) | |
download | gcc-e7d8fc6c1069d17cba2e0fb4ab6ec69b50273f08.zip gcc-e7d8fc6c1069d17cba2e0fb4ab6ec69b50273f08.tar.gz gcc-e7d8fc6c1069d17cba2e0fb4ab6ec69b50273f08.tar.bz2 |
sse.md (*<ssse3_avx2>_pmulhrsw<mode>3): Merge *avx2_pmulhrswv16hi3 and...
* config/i386/sse.md (*<ssse3_avx2>_pmulhrsw<mode>3): Merge
*avx2_pmulhrswv16hi3 and *ssse3_pmulhrswv8hi3 into one pattern.
From-SVN: r193656
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/ChangeLog | 5 | ||||
-rw-r--r-- | gcc/config/i386/sse.md | 49 |
2 files changed, 19 insertions, 35 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 9e0b0d3..92c138f 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2012-11-20 Andrey Turetskiy <andrey.turetskiy@gmail.com> + + * config/i386/sse.md (*<ssse3_avx2>_pmulhrsw<mode>3): Merge + *avx2_pmulhrswv16hi3 and *ssse3_pmulhrswv8hi3 into one pattern. + 2012-11-20 Sofiane Naci <sofiane.naci@arm.com> * config/aarch64/aarch64.md diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 826c0aa..8ba07e8 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -8226,42 +8226,21 @@ ix86_fixup_binary_operands_no_copy (MULT, <MODE>mode, operands); }) -(define_insn "*avx2_pmulhrswv16hi3" - [(set (match_operand:V16HI 0 "register_operand" "=x") - (truncate:V16HI - (lshiftrt:V16SI - (plus:V16SI - (lshiftrt:V16SI - (mult:V16SI - (sign_extend:V16SI - (match_operand:V16HI 1 "nonimmediate_operand" "%x")) - (sign_extend:V16SI - (match_operand:V16HI 2 "nonimmediate_operand" "xm"))) - (const_int 14)) - (match_operand:V16HI 3 "const1_operand")) - (const_int 1))))] - "TARGET_AVX2 && ix86_binary_operator_ok (MULT, V16HImode, operands)" - "vpmulhrsw\t{%2, %1, %0|%0, %1, %2}" - [(set_attr "type" "sseimul") - (set_attr "prefix_extra" "1") - (set_attr "prefix" "vex") - (set_attr "mode" "OI")]) - -(define_insn "*ssse3_pmulhrswv8hi3" - [(set (match_operand:V8HI 0 "register_operand" "=x,x") - (truncate:V8HI - (lshiftrt:V8SI - (plus:V8SI - (lshiftrt:V8SI - (mult:V8SI - (sign_extend:V8SI - (match_operand:V8HI 1 "nonimmediate_operand" "%0,x")) - (sign_extend:V8SI - (match_operand:V8HI 2 "nonimmediate_operand" "xm,xm"))) +(define_insn "*<ssse3_avx2>_pmulhrsw<mode>3" + [(set (match_operand:VI2_AVX2 0 "register_operand" "=x,x") + (truncate:VI2_AVX2 + (lshiftrt:<ssedoublemode> + (plus:<ssedoublemode> + (lshiftrt:<ssedoublemode> + (mult:<ssedoublemode> + (sign_extend:<ssedoublemode> + (match_operand:VI2_AVX2 1 "nonimmediate_operand" "%0,x")) + (sign_extend:<ssedoublemode> + (match_operand:VI2_AVX2 2 "nonimmediate_operand" "xm,xm"))) (const_int 14)) - (match_operand:V8HI 3 "const1_operand")) + (match_operand:VI2_AVX2 3 "const1_operand")) (const_int 1))))] - "TARGET_SSSE3 && ix86_binary_operator_ok (MULT, V8HImode, operands)" + "TARGET_SSSE3 && ix86_binary_operator_ok (MULT, <MODE>mode, operands)" "@ pmulhrsw\t{%2, %0|%0, %2} vpmulhrsw\t{%2, %1, %0|%0, %1, %2}" @@ -8270,7 +8249,7 @@ (set_attr "prefix_data16" "1,*") (set_attr "prefix_extra" "1") (set_attr "prefix" "orig,vex") - (set_attr "mode" "TI")]) + (set_attr "mode" "<sseinsnmode>")]) (define_insn "*ssse3_pmulhrswv4hi3" [(set (match_operand:V4HI 0 "register_operand" "=y") |