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| author | Michael Meissner <meissner@linux.ibm.com> | 2019-10-03 00:13:40 +0000 |
|---|---|---|
| committer | Michael Meissner <meissner@gcc.gnu.org> | 2019-10-03 00:13:40 +0000 |
| commit | e5ec901cec9de5295bb323f538d6addd479bac46 (patch) | |
| tree | 50ae0cbc0d3337409ae8a44378354c6930483441 /gcc | |
| parent | 202be58655a1964581facd2e514c7d3431258fe8 (diff) | |
| download | gcc-e5ec901cec9de5295bb323f538d6addd479bac46.zip gcc-e5ec901cec9de5295bb323f538d6addd479bac46.tar.gz gcc-e5ec901cec9de5295bb323f538d6addd479bac46.tar.bz2 | |
Use the SIGNED_16BIT_OFFSET_EXTRA_P macro for 16-bit signed tests.
2019-10-02 Michael Meissner <meissner@linux.ibm.com>
* config/rs6000/rs6000.c (mem_operand_gpr): Use
SIGNED_16BIT_OFFSET_EXTRA_P.
(mem_operand_ds_form): Use SIGNED_16BIT_OFFSET_EXTRA_P.
(rs6000_mode_dependent_address): Use SIGNED_16BIT_OFFSET_EXTRA_P.
From-SVN: r276498
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 8 | ||||
| -rw-r--r-- | gcc/config/rs6000/predicates.md | 3 | ||||
| -rw-r--r-- | gcc/config/rs6000/rs6000.c | 12 |
3 files changed, 16 insertions, 7 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 26c5c42..2d6bdba 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2019-10-02 Michael Meissner <meissner@linux.ibm.com> + + * config/rs6000/rs6000.c (mem_operand_gpr): Use + SIGNED_16BIT_OFFSET_EXTRA_P macro. + (mem_operand_ds_form): Use SIGNED_16BIT_OFFSET_EXTRA_P macro. + (rs6000_mode_dependent_address): Use SIGNED_16BIT_OFFSET_EXTRA_P + macro. + 2019-10-02 Joseph Myers <joseph@codesourcery.com> * ginclude/stdint-gcc.h [__STDC_WANT_IEC_60559_BFP_EXT__]: Change diff --git a/gcc/config/rs6000/predicates.md b/gcc/config/rs6000/predicates.md index 345d9c3..2e13a7e 100644 --- a/gcc/config/rs6000/predicates.md +++ b/gcc/config/rs6000/predicates.md @@ -851,7 +851,8 @@ ;; Return 1 if OP is a constant but not a valid add_operand. (define_predicate "non_add_cint_operand" (and (match_code "const_int") - (not (match_operand 0 "add_operand")))) + (match_test "!satisfies_constraint_I (op) + && !satisfies_constraint_L (op)"))) ;; Return 1 if the operand is a constant that can be used as the operand ;; of an AND, OR or XOR. diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 330e249..a4a3882 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -7372,7 +7372,7 @@ mem_operand_gpr (rtx op, machine_mode mode) causes a wrap, so test only the low 16 bits. */ offset = ((offset & 0xffff) ^ 0x8000) - 0x8000; - return offset + 0x8000 < 0x10000u - extra; + return SIGNED_16BIT_OFFSET_EXTRA_P (offset, extra); } /* As above, but for DS-FORM VSX insns. Unlike mem_operand_gpr, @@ -7405,7 +7405,7 @@ mem_operand_ds_form (rtx op, machine_mode mode) causes a wrap, so test only the low 16 bits. */ offset = ((offset & 0xffff) ^ 0x8000) - 0x8000; - return offset + 0x8000 < 0x10000u - extra; + return SIGNED_16BIT_OFFSET_EXTRA_P (offset, extra); } /* Subroutines of rs6000_legitimize_address and rs6000_legitimate_address_p. */ @@ -7754,8 +7754,7 @@ rs6000_legitimate_offset_address_p (machine_mode mode, rtx x, break; } - offset += 0x8000; - return offset < 0x10000 - extra; + return SIGNED_16BIT_OFFSET_EXTRA_P (offset, extra); } bool @@ -8772,8 +8771,9 @@ rs6000_mode_dependent_address (const_rtx addr) && XEXP (addr, 0) != arg_pointer_rtx && CONST_INT_P (XEXP (addr, 1))) { - unsigned HOST_WIDE_INT val = INTVAL (XEXP (addr, 1)); - return val + 0x8000 >= 0x10000 - (TARGET_POWERPC64 ? 8 : 12); + HOST_WIDE_INT val = INTVAL (XEXP (addr, 1)); + HOST_WIDE_INT extra = TARGET_POWERPC64 ? 8 : 12; + return !SIGNED_16BIT_OFFSET_EXTRA_P (val, extra); } break; |