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| author | Michael Meissner <meissner@linux.ibm.com> | 2020-06-09 15:32:02 -0500 |
|---|---|---|
| committer | Michael Meissner <meissner@linux.ibm.com> | 2020-06-09 15:32:02 -0500 |
| commit | 7ba33e898fa4a097c0f2b4d9cae35041a5933f9c (patch) | |
| tree | 76af8e1581a516553b2c28d5476a26de11061cb2 /gcc | |
| parent | 243e5bbfef7be74bfe22747c4e51136dd38c1245 (diff) | |
| download | gcc-7ba33e898fa4a097c0f2b4d9cae35041a5933f9c.zip gcc-7ba33e898fa4a097c0f2b4d9cae35041a5933f9c.tar.gz gcc-7ba33e898fa4a097c0f2b4d9cae35041a5933f9c.tar.bz2 | |
PowerPC: Add future hwcap2 bits
This patch adds support for the two new HWCAP2 fields used by the
__builtin_cpu_supports function. It adds support in the target_clones
attribute for -mcpu=future.
The two new __builtin_cpu_supports tests are:
__builtin_cpu_supports ("isa_3_1")
__builtin_cpu_supports ("mma")
The bits used are the bits that the Linux kernel engineers will be using for
these new features.
gcc/
2020-06-05 Michael Meissner <meissner@linux.ibm.com>
* config/rs6000/ppc-auxv.h (PPC_PLATFORM_FUTURE): Allocate
'future' PowerPC platform.
(PPC_FEATURE2_ARCH_3_1): New HWCAP2 bit for ISA 3.1.
(PPC_FEATURE2_MMA): New HWCAP2 bit for MMA.
* config/rs6000/rs6000-call.c (cpu_supports_info): Add ISA 3.1 and
MMA HWCAP2 bits.
* config/rs6000/rs6000.c (CLONE_ISA_3_1): New clone support.
(rs6000_clone_map): Add 'future' system target_clones support.
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/config/rs6000/ppc-auxv.h | 6 | ||||
| -rw-r--r-- | gcc/config/rs6000/rs6000-call.c | 4 | ||||
| -rw-r--r-- | gcc/config/rs6000/rs6000.c | 2 |
3 files changed, 11 insertions, 1 deletions
diff --git a/gcc/config/rs6000/ppc-auxv.h b/gcc/config/rs6000/ppc-auxv.h index 3232931..e51d039 100644 --- a/gcc/config/rs6000/ppc-auxv.h +++ b/gcc/config/rs6000/ppc-auxv.h @@ -48,6 +48,9 @@ #define PPC_PLATFORM_POWER8 13 #define PPC_PLATFORM_POWER9 14 +/* This is not yet official. */ +#define PPC_PLATFORM_FUTURE 15 + /* AT_HWCAP bits. These must match the values defined in the Linux kernel. */ #define PPC_FEATURE_32 0x80000000 #define PPC_FEATURE_64 0x40000000 @@ -93,6 +96,9 @@ #define PPC_FEATURE2_SCV 0x00100000 #define PPC_FEATURE2_HTM_NO_SUSPEND 0x00080000 +/* These are not yet official. */ +#define PPC_FEATURE2_ARCH_3_1 0x00040000 +#define PPC_FEATURE2_MMA 0x00020000 /* Thread Control Block (TCB) offsets of the AT_PLATFORM, AT_HWCAP and AT_HWCAP2 values. These must match the values defined in GLIBC. */ diff --git a/gcc/config/rs6000/rs6000-call.c b/gcc/config/rs6000/rs6000-call.c index 0ac8054..817a14c 100644 --- a/gcc/config/rs6000/rs6000-call.c +++ b/gcc/config/rs6000/rs6000-call.c @@ -172,7 +172,9 @@ static const struct { "arch_3_00", PPC_FEATURE2_ARCH_3_00, 1 }, { "ieee128", PPC_FEATURE2_HAS_IEEE128, 1 }, { "darn", PPC_FEATURE2_DARN, 1 }, - { "scv", PPC_FEATURE2_SCV, 1 } + { "scv", PPC_FEATURE2_SCV, 1 }, + { "arch_3_1", PPC_FEATURE2_ARCH_3_1, 1 }, + { "mma", PPC_FEATURE2_MMA, 1 }, }; static void altivec_init_builtins (void); diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index ff09e93..0bbd06a 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -260,6 +260,7 @@ enum { CLONE_ISA_2_06, /* ISA 2.06 (power7). */ CLONE_ISA_2_07, /* ISA 2.07 (power8). */ CLONE_ISA_3_00, /* ISA 3.00 (power9). */ + CLONE_ISA_3_1, /* ISA 3.1 (future). */ CLONE_MAX }; @@ -275,6 +276,7 @@ static const struct clone_map rs6000_clone_map[CLONE_MAX] = { { OPTION_MASK_POPCNTD, "arch_2_06" }, /* ISA 2.06 (power7). */ { OPTION_MASK_P8_VECTOR, "arch_2_07" }, /* ISA 2.07 (power8). */ { OPTION_MASK_P9_VECTOR, "arch_3_00" }, /* ISA 3.00 (power9). */ + { OPTION_MASK_FUTURE, "arch_3_1" }, /* ISA 3.1 (future). */ }; |