i386.c (ix86_comparison_operator, [...]): Handle CCRCmode.

        * i386.c (ix86_comparison_operator, put_condition_code,
        ix86_match_ccmode, ix86_cc_mode): Handle CCRCmode.
        (ix86_expand_strlensi_unroll_1): Use CCRCmode.
        * i386.h (EXTRA_CC_MODES): Add CCRCmode.
        * i386.md (adddi and negdi splitter): Use CCRCmode.
        (add?i_3, add?i_4, add?i_5): Use CCRCmode; swap operands
        (subsi3_carry): add '*'
        (addsi3_carry_rc, subsi3_carry_rc, x86_movsicc_0_m1_rc): New.
        (cmp to add peep2): Use CCRCmode; swap operands.

From-SVN: r36927

4 files changed, 146 insertions, 67 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 0243c19..24f71be 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,15 @@
+2000-10-18  Jan Hubikca  <jh@suse.cz>
+
+        * i386.c (ix86_comparison_operator, put_condition_code,
+        ix86_match_ccmode, ix86_cc_mode): Handle CCRCmode.
+        (ix86_expand_strlensi_unroll_1): Use CCRCmode.
+        * i386.h (EXTRA_CC_MODES): Add CCRCmode.
+        * i386.md (adddi and negdi splitter): Use CCRCmode.
+        (add?i_3, add?i_4, add?i_5): Use CCRCmode; swap operands
+        (subsi3_carry): add '*'
+        (addsi3_carry_rc, subsi3_carry_rc, x86_movsicc_0_m1_rc): New.
+        (cmp to add peep2): Use CCRCmode; swap operands.
+
 2000-10-18  Kazu Hirata  <kazu@hxi.com>
 
 	* config/h8300/h8300.md: Remove an unnecessary sign_extend
@@ -307,11 +319,9 @@ Tue Oct 17 20:05:51 2000  Martin Buchholz <martin@xemacs.org>
 	* gengenrtl.c (gendef): Don't include
 	ggc_p conditionals.  
 	* ggc-callbacks.c (ggc_p): Remove.  
-	*
-	ggc-none.c (ggc_p): Remove.  
+	* ggc-none.c (ggc_p): Remove.  
 	* ggc.h (ggc_p): Don't declare.  
-	*
-	integrate.c (save_for_inline): Don't mess with obstacks.
+	* integrate.c (save_for_inline): Don't mess with obstacks.
 	(integrate_decl_tree): Likewise.
 	(output_inline_function): Likewise.  
 	* lists.c
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 1f0bee7..b9bd81c 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -1305,18 +1305,22 @@ ix86_comparison_operator (op, mode)
       return 1;
     case LT: case GE:
       inmode = GET_MODE (XEXP (op, 0));
-      if (inmode == CCmode || inmode == CCGCmode
+      if (inmode == CCmode || inmode == CCGCmode || inmode == CCRCmode
 	  || inmode == CCGOCmode || inmode == CCNOmode)
 	return 1;
       return 0;
-    case LTU: case GTU: case LEU: case ORDERED: case UNORDERED: case GEU:
+    case LTU: case GTU:
       inmode = GET_MODE (XEXP (op, 0));
-      if (inmode == CCmode)
+      return inmode == CCmode;
+    case LEU: case ORDERED: case UNORDERED: case GEU:
+      inmode = GET_MODE (XEXP (op, 0));
+      if (inmode == CCmode || inmode == CCRCmode)
 	return 1;
       return 0;
     case GT: case LE:
       inmode = GET_MODE (XEXP (op, 0));
-      if (inmode == CCmode || inmode == CCGCmode || inmode == CCNOmode)
+      if (inmode == CCmode || inmode == CCGCmode || inmode == CCNOmode
+	  || inmode == CCRCmode)
 	return 1;
       return 0;
     default:
@@ -3108,21 +3112,22 @@ put_condition_code (code, mode, reverse, fp, file)
       suffix = "ne";
       break;
     case GT:
-      if (mode != CCmode && mode != CCNOmode && mode != CCGCmode)
+      if (mode != CCmode && mode != CCNOmode && mode != CCGCmode
+	  && mode != CCRCmode)
 	abort ();
       suffix = "g";
       break;
     case GTU:
       /* ??? Use "nbe" instead of "a" for fcmov losage on some assemblers.
 	 Those same assemblers have the same but opposite losage on cmov.  */
-      if (mode != CCmode)
+      if (mode != CCmode && mode != CCRCmode)
 	abort ();
       suffix = fp ? "nbe" : "a";
       break;
     case LT:
       if (mode == CCNOmode || mode == CCGOCmode)
 	suffix = "s";
-      else if (mode == CCmode || mode == CCGCmode)
+      else if (mode == CCmode || mode == CCGCmode || mode == CCRCmode)
 	suffix = "l";
       else
 	abort ();
@@ -3135,26 +3140,33 @@ put_condition_code (code, mode, reverse, fp, file)
     case GE:
       if (mode == CCNOmode || mode == CCGOCmode)
 	suffix = "ns";
-      else if (mode == CCmode || mode == CCGCmode)
+      else if (mode == CCmode || mode == CCGCmode || mode == CCRCmode)
 	suffix = "ge";
       else
 	abort ();
       break;
     case GEU:
       /* ??? As above.  */
-      if (mode != CCmode)
+      if (mode != CCmode && mode != CCRCmode)
 	abort ();
-      suffix = fp ? "nb" : "ae";
+      if (mode == CCRCmode)
+	suffix = "be";
+      else
+	suffix = fp ? "nb" : "ae";
       break;
     case LE:
-      if (mode != CCmode && mode != CCGCmode && mode != CCNOmode)
+      if (mode != CCmode && mode != CCGCmode && mode != CCNOmode
+	  && mode != CCRCmode)
 	abort ();
       suffix = "le";
       break;
     case LEU:
       if (mode != CCmode)
 	abort ();
-      suffix = "be";
+      if (mode == CCRCmode)
+	suffix = fp ? "nb" : "ae";
+      else
+        suffix = "be";
       break;
     case UNORDERED:
       suffix = "p";
@@ -4552,6 +4564,13 @@ ix86_match_ccmode (insn, req_mode)
 	return 0;
       break;
     case CCmode:
+      if (req_mode == CCRCmode)
+	return 0;
+      goto no_carry;
+    case CCRCmode:
+      if (req_mode == CCmode)
+	return 0;
+    no_carry:
       if (req_mode == CCGCmode)
 	return 0;
       /* FALLTHRU */
@@ -4683,11 +4702,14 @@ ix86_cc_mode (code, op0, op1)
     case NE:			/* ZF!=0 */
       return CCZmode;
       /* Codes needing carry flag.  */
-    case GEU:			/* CF=0 */
-    case GTU:			/* CF=0 & ZF=0 */
     case LTU:			/* CF=1 */
     case LEU:			/* CF=1 | ZF=1 */
       return CCmode;
+    case GEU:			/* CF=0 */
+    case GTU:			/* CF=0 & ZF=0 */
+      if (GET_CODE (op1) == NEG)
+	return CCRCmode;
+      return CCmode;
       /* Codes possibly doable only with sign flag when
          comparing against zero.  */
     case GE:			/* SF=OF   or   SF=0 */
@@ -6145,8 +6167,8 @@ ix86_expand_strlensi_unroll_1 (out, align_rtx, scratch)
 
   /* Avoid branch in fixing the byte.  */
   tmpreg = gen_lowpart (QImode, tmpreg);
-  emit_insn (gen_addqi3_cc (tmpreg, tmpreg, tmpreg));
-  emit_insn (gen_subsi3_carry (out, out, GEN_INT (3)));
+  emit_insn (gen_addqi3_ccrc (tmpreg, tmpreg, tmpreg));
+  emit_insn (gen_subsi3_carry_rc (out, out, GEN_INT (3)));
 
   emit_label (end_0_label);
 }
diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h
index c2b580c..7cf818d 100644
--- a/gcc/config/i386/i386.h
+++ b/gcc/config/i386/i386.h
@@ -2488,10 +2488,14 @@ while (0)
    mode is used to simulate comparisons of (a-b) and (a+b)
    against zero using sub/cmp/add operations.
 
-   Add CCZ to indicate that only the Zero flag is valid.  */
+   Add CCZ to indicate that only the Zero flag is valid.  
+
+   Add CCRC to indicate that carry flag is valid, but reversed.
+*/
 
 #define EXTRA_CC_MODES \
 	CC(CCGCmode, "CCGC") \
+	CC(CCRCmode, "CCRC") \
 	CC(CCGOCmode, "CCGOC") \
 	CC(CCNOmode, "CCNO") \
 	CC(CCZmode, "CCZ") \
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index b89f50e..3d908ea 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -3738,10 +3738,11 @@
 		 (match_operand:DI 2 "general_operand" "")))
    (clobber (reg:CC 17))]
   "reload_completed"
-  [(parallel [(set (reg:CC 17) (compare:CC (neg:SI (match_dup 2)) (match_dup 1)))
+  [(parallel [(set (reg:CCRC 17)
+		   (compare:CCRC (match_dup 1) (neg:SI (match_dup 2))))
 	      (set (match_dup 0) (plus:SI (match_dup 1) (match_dup 2)))])
    (parallel [(set (match_dup 3)
-		   (plus:SI (plus:SI (ltu:SI (reg:CC 17) (const_int 0))
+		   (plus:SI (plus:SI (gtu:SI (reg:CCRC 17) (const_int 0))
 				     (match_dup 4))
 			    (match_dup 5)))
 	      (clobber (reg:CC 17))])]
@@ -3762,6 +3763,19 @@
    (set_attr "mode" "SI")
    (set_attr "ppro_uops" "few")])
 
+(define_insn "*addsi3_carry_rc"
+  [(set (match_operand:SI 0 "nonimmediate_operand" "=rm,r")
+	  (plus:SI (plus:SI (gtu:SI (reg:CCRC 17) (const_int 0))
+			    (match_operand:SI 1 "nonimmediate_operand" "%0,0"))
+		   (match_operand:SI 2 "general_operand" "ri,rm")))
+   (clobber (reg:CC 17))]
+  "ix86_binary_operator_ok (PLUS, SImode, operands)"
+  "adc{l}\\t{%2, %0|%0, %2}"
+  [(set_attr "type" "alu")
+   (set_attr "pent_pair" "pu")
+   (set_attr "mode" "SI")
+   (set_attr "ppro_uops" "few")])
+
 (define_expand "addsi3"
   [(parallel [(set (match_operand:SI 0 "nonimmediate_operand" "")
 		   (plus:SI (match_operand:SI 1 "nonimmediate_operand" "")
@@ -4006,8 +4020,8 @@
 
 (define_insn "*addsi_3"
   [(set (reg 17)
-	(compare (neg:SI (match_operand:SI 2 "general_operand" "rmni"))
-		 (match_operand:SI 1 "nonimmediate_operand" "%0")))
+	(compare (match_operand:SI 1 "nonimmediate_operand" "%0")
+		 (neg:SI (match_operand:SI 2 "general_operand" "rmni"))))
    (clobber (match_scratch:SI 0 "=r"))]
   "ix86_match_ccmode (insn, CCGCmode)
    && (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)
@@ -4052,12 +4066,12 @@
 
 (define_insn "*addsi_4"
   [(set (reg 17)
-	(compare (neg:SI (match_operand:SI 2 "general_operand" "rmni,rni"))
-		 (match_operand:SI 1 "nonimmediate_operand" "%0,0")))
+	(compare (match_operand:SI 1 "nonimmediate_operand" "%0,0")
+		 (neg:SI (match_operand:SI 2 "general_operand" "rmni,rni"))))
    (set (match_operand:SI 0 "nonimmediate_operand" "=r,rm")
 	(plus:SI (match_dup 1) (match_dup 2)))]
   "ix86_binary_operator_ok (PLUS, SImode, operands)
-   && ix86_match_ccmode (insn, CCmode)
+   && ix86_match_ccmode (insn, CCRCmode)
    /* Current assemblers are broken and do not allow @GOTOFF in
       ought but a memory context. */
    && ! pic_symbolic_operand (operands[2], VOIDmode)"
@@ -4067,11 +4081,11 @@
 
 (define_insn "*addsi_5"
   [(set (reg 17)
-	(compare (neg:SI (match_operand:SI 2 "general_operand" "rmni"))
-		 (match_operand:SI 1 "nonimmediate_operand" "%0")))
+	(compare (match_operand:SI 1 "nonimmediate_operand" "%0")
+		 (neg:SI (match_operand:SI 2 "general_operand" "rmni"))))
    (clobber (match_scratch:SI 0 "=r"))]
   "(GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)
-   && ix86_match_ccmode (insn, CCmode)
+   && ix86_match_ccmode (insn, CCRCmode)
    /* Current assemblers are broken and do not allow @GOTOFF in
       ought but a memory context. */
    && ! pic_symbolic_operand (operands[2], VOIDmode)"
@@ -4268,8 +4282,8 @@
 
 (define_insn "*addhi_3"
   [(set (reg 17)
-	(compare (neg:HI (match_operand:HI 2 "general_operand" "rmni"))
-		 (match_operand:HI 1 "nonimmediate_operand" "%0")))
+	(compare (match_operand:HI 1 "nonimmediate_operand" "%0")
+		 (neg:HI (match_operand:HI 2 "general_operand" "rmni"))))
    (clobber (match_scratch:HI 0 "=r"))]
   "ix86_match_ccmode (insn, CCGCmode)
    && (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)"
@@ -4308,11 +4322,11 @@
 
 (define_insn "*addhi_4"
   [(set (reg 17)
-	(compare (neg:HI (match_operand:HI 2 "general_operand" "rmni,rni"))
-		 (match_operand:HI 1 "nonimmediate_operand" "%0,0")))
+	(compare (match_operand:HI 1 "nonimmediate_operand" "%0,0")
+		 (neg:HI (match_operand:HI 2 "general_operand" "rmni,rni"))))
    (set (match_operand:HI 0 "nonimmediate_operand" "=r,rm")
 	(plus:HI (match_dup 1) (match_dup 2)))]
-  "ix86_match_ccmode (insn, CCmode)
+  "ix86_match_ccmode (insn, CCRCmode)
    && ix86_binary_operator_ok (PLUS, HImode, operands)"
   "add{w}\\t{%2, %0|%0, %2}"
   [(set_attr "type" "alu")
@@ -4320,10 +4334,10 @@
 
 (define_insn "*addhi_5"
   [(set (reg 17)
-	(compare (neg:HI (match_operand:HI 2 "general_operand" "rmni"))
-		 (match_operand:HI 1 "nonimmediate_operand" "%0")))
+	(compare (match_operand:HI 1 "nonimmediate_operand" "%0")
+		 (neg:HI (match_operand:HI 2 "general_operand" "rmni"))))
    (clobber (match_scratch:HI 0 "=r"))]
-  "ix86_match_ccmode (insn, CCmode)
+  "ix86_match_ccmode (insn, CCRCmode)
    && (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)"
   "add{w}\\t{%2, %0|%0, %2}"
   [(set_attr "type" "alu")
@@ -4520,8 +4534,8 @@
 
 (define_insn "*addqi_3"
   [(set (reg 17)
-	(compare (neg:QI (match_operand:QI 2 "general_operand" "qmni"))
-		 (match_operand:QI 1 "nonimmediate_operand" "%0")))
+	(compare (match_operand:QI 1 "nonimmediate_operand" "%0")
+		 (neg:QI (match_operand:QI 2 "general_operand" "qmni"))))
    (clobber (match_scratch:QI 0 "=r"))]
   "ix86_match_ccmode (insn, CCGCmode)
    && (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)"
@@ -4557,31 +4571,31 @@
 
 (define_insn "*addqi_4"
   [(set (reg 17)
-	(compare (neg:QI (match_operand:QI 2 "general_operand" "qmni,qni"))
-		 (match_operand:QI 1 "nonimmediate_operand" "%0,0")))
+	(compare (match_operand:QI 1 "nonimmediate_operand" "%0,0")
+		 (neg:QI (match_operand:QI 2 "general_operand" "qmni,qni"))))
    (set (match_operand:QI 0 "nonimmediate_operand" "=q,qm")
 	(plus:QI (match_dup 1) (match_dup 2)))]
-  "ix86_match_ccmode (insn, CCmode)
+  "ix86_match_ccmode (insn, CCRCmode)
    && ix86_binary_operator_ok (PLUS, QImode, operands)"
   "add{b}\\t{%2, %0|%0, %2}"
   [(set_attr "type" "alu")
    (set_attr "mode" "QI")])
 
-(define_expand "addqi3_cc"
+(define_expand "addqi3_ccrc"
   [(parallel [
-     (set (reg:CC 17)
-	  (compare:CC (neg:QI (match_operand:QI 2 "general_operand" ""))
-		      (match_operand:QI 1 "nonimmediate_operand" "")))
+     (set (reg:CCRC 17)
+	  (compare:CCRC (match_operand:QI 1 "nonimmediate_operand" "")
+		        (neg:QI (match_operand:QI 2 "general_operand" ""))))
      (clobber (match_scratch:QI 0 ""))])]
   ""
   "")
 
 (define_insn "*addqi_5"
   [(set (reg 17)
-	(compare (neg:QI (match_operand:QI 2 "general_operand" "qmni"))
-		 (match_operand:QI 1 "nonimmediate_operand" "%0")))
+	(compare (match_operand:QI 1 "nonimmediate_operand" "%0")
+		 (neg:QI (match_operand:QI 2 "general_operand" "qmni"))))
    (clobber (match_scratch:QI 0 "=r"))]
-  "ix86_match_ccmode (insn, CCmode)
+  "ix86_match_ccmode (insn, CCRCmode)
    && (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)"
   "add{b}\\t{%2, %0|%0, %2}"
   [(set_attr "type" "alu")
@@ -4734,7 +4748,7 @@
    split_di (operands+1, 1, operands+1, operands+4);
    split_di (operands+2, 1, operands+2, operands+5);")
 
-(define_insn "subsi3_carry"
+(define_insn "*subsi3_carry"
   [(set (match_operand:SI 0 "nonimmediate_operand" "=rm,r")
 	  (minus:SI (match_operand:SI 1 "nonimmediate_operand" "0,0")
 	    (plus:SI (ltu:SI (reg:CC 17) (const_int 0))
@@ -4747,6 +4761,19 @@
    (set_attr "ppro_uops" "few")
    (set_attr "mode" "SI")])
 
+(define_insn "subsi3_carry_rc"
+  [(set (match_operand:SI 0 "nonimmediate_operand" "=rm,r")
+	  (minus:SI (match_operand:SI 1 "nonimmediate_operand" "0,0")
+	    (plus:SI (gtu:SI (reg:CCRC 17) (const_int 0))
+	       (match_operand:SI 2 "general_operand" "ri,rm"))))
+   (clobber (reg:CC 17))]
+  "ix86_binary_operator_ok (MINUS, SImode, operands)"
+  "sbb{l}\\t{%2, %0|%0, %2}"
+  [(set_attr "type" "alu")
+   (set_attr "pent_pair" "pu")
+   (set_attr "ppro_uops" "few")
+   (set_attr "mode" "SI")])
+
 (define_expand "subsi3"
   [(parallel [(set (match_operand:SI 0 "nonimmediate_operand" "")
 		   (minus:SI (match_operand:SI 1 "nonimmediate_operand" "")
@@ -6142,7 +6169,7 @@
      (set (match_dup 0) (neg:SI (match_dup 2)))])
    (parallel
     [(set (match_dup 1)
-	  (plus:SI (plus:SI (ltu:SI (reg:CC 17) (const_int 0))
+	  (plus:SI (plus:SI (gtu:SI (reg:CCRC 17) (const_int 0))
 			    (match_dup 3))
 		   (const_int 0)))
      (clobber (reg:CC 17))])
@@ -10576,6 +10603,22 @@
    (set_attr "mode" "SI")
    (set_attr "length_immediate" "0")])
 
+(define_insn "x86_movsicc_0_m1_rc"
+  [(set (match_operand:SI 0 "register_operand" "=r")
+	(if_then_else:SI (gtu (reg:CCRC 17) (const_int 0))
+	  (const_int -1)
+	  (const_int 0)))
+   (clobber (reg:CC 17))]
+  ""
+  "sbb{l}\\t%0, %0"
+  ; Since we don't have the proper number of operands for an alu insn,
+  ; fill in all the blanks.
+  [(set_attr "type" "alu")
+   (set_attr "memory" "none")
+   (set_attr "imm_disp" "false")
+   (set_attr "mode" "SI")
+   (set_attr "length_immediate" "0")])
+
 (define_insn "*movsicc_noc"
   [(set (match_operand:SI 0 "register_operand" "=r,r")
 	(if_then_else:SI (match_operator 1 "ix86_comparison_operator" 
@@ -11413,8 +11456,8 @@
   "ix86_match_ccmode (insn, CCGCmode)
    && find_regno_note (insn, REG_DEAD, true_regnum (operands[0]))"
   [(parallel [(set (reg:CCGC 17)
-		   (compare:CCGC (neg:SI (match_dup 1))
-				 (match_dup 0)))
+		   (compare:CCGC (match_dup 0)
+				 (neg:SI (match_dup 1))))
 	      (clobber (match_dup 0))])]
   "operands[1] = (operands[1] == const1_rtx) ? constm1_rtx : const1_rtx;")
 
@@ -11425,8 +11468,8 @@
   "ix86_match_ccmode (insn, CCGCmode)
    && find_regno_note (insn, REG_DEAD, true_regnum (operands[0]))"
   [(parallel [(set (reg:CCGC 17)
-		   (compare:CCGC (neg:HI (match_dup 1))
-				 (match_dup 0)))
+		   (compare:CCGC (match_dup 0)
+				 (neg:HI (match_dup 1))))
 	      (clobber (match_dup 0))])]
   "operands[1] = (operands[1] == const1_rtx) ? constm1_rtx : const1_rtx;")
 
@@ -11437,8 +11480,8 @@
   "ix86_match_ccmode (insn, CCGCmode)
    && find_regno_note (insn, REG_DEAD, true_regnum (operands[0]))"
   [(parallel [(set (reg:CCGC 17)
-		   (compare:CCGC (neg:QI (match_dup 1))
-				 (match_dup 0)))
+		   (compare:CCGC (match_dup 0)
+				 (neg:QI (match_dup 1))))
 	      (clobber (match_dup 0))])]
   "operands[1] = (operands[1] == const1_rtx) ? constm1_rtx : const1_rtx;")
 
@@ -11447,11 +11490,11 @@
   [(set (reg 17)
 	(compare (match_operand:SI 0 "register_operand" "")
 		 (const_int 128)))]
-  "ix86_match_ccmode (insn, CCmode)
+  "ix86_match_ccmode (insn, CCRCmode)
    && find_regno_note (insn, REG_DEAD, true_regnum (operands[0]))"
-  [(parallel [(set (reg:CC 17)
-		   (compare:CC (neg:SI (const_int -128))
-			       (match_dup 0)))
+  [(parallel [(set (reg:CCRC 17)
+		   (compare:CCRC (match_dup 0)
+			         (neg:SI (const_int -128))))
 	      (clobber (match_dup 0))])]
   "")
 
@@ -11459,11 +11502,11 @@
   [(set (reg 17)
 	(compare (match_operand:HI 0 "register_operand" "")
 		 (const_int 128)))]
-  "ix86_match_ccmode (insn, CCmode)
+  "ix86_match_ccmode (insn, CCRCmode)
    && find_regno_note (insn, REG_DEAD, true_regnum (operands[0]))"
-  [(parallel [(set (reg:CC 17)
-		   (compare:CC (neg:HI (const_int -128))
-			       (match_dup 0)))
+  [(parallel [(set (reg:CCRC 17)
+		   (compare:CCRC (match_dup 0)
+			         (neg:HI (const_int -128))))
 	      (clobber (match_dup 0))])]
   "")