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author | Oleg Endo <olegendo@gcc.gnu.org> | 2013-06-09 21:32:37 +0000 |
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committer | Oleg Endo <olegendo@gcc.gnu.org> | 2013-06-09 21:32:37 +0000 |
commit | 0d00888247bcfe39791153f9aa1fd8734f58bc74 (patch) | |
tree | 5cfdce74e6c97d2a997232dd0f3a63aab12de94e /gcc | |
parent | 3e56ed50d74ae33d87353df9a5aff5c247a81349 (diff) | |
download | gcc-0d00888247bcfe39791153f9aa1fd8734f58bc74.zip gcc-0d00888247bcfe39791153f9aa1fd8734f58bc74.tar.gz gcc-0d00888247bcfe39791153f9aa1fd8734f58bc74.tar.bz2 |
re PR target/6526 ([SH4] sdivsi3_i4 can clobber xd0/xd2)
PR target/6526
* config/sh/lib1funcs.S (sdivsi3_i4, udivsi3_i4): Do not change bits
other than FPSCR.PR and FPSCR.SZ. Add SH4A implementation.
PR target/6526
* gcc.target/sh/pr6526.c: New.
From-SVN: r199873
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/testsuite/ChangeLog | 5 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/sh/pr6526.c | 64 |
2 files changed, 69 insertions, 0 deletions
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 0ba3af6..cae5502 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2013-06-09 Oleg Endo <olegendo@gcc.gnu.org> + + PR target/6526 + * gcc.target/sh/pr6526.c: New. + 2013-06-09 Jakub Jelinek <jakub@redhat.com> PR target/57568 diff --git a/gcc/testsuite/gcc.target/sh/pr6526.c b/gcc/testsuite/gcc.target/sh/pr6526.c new file mode 100644 index 0000000..a7dd6d8 --- /dev/null +++ b/gcc/testsuite/gcc.target/sh/pr6526.c @@ -0,0 +1,64 @@ +/* Check that the XF registers are not clobbered by an integer division + that is done using double precision FPU division. */ +/* { dg-do run { target "sh*-*-*" } } */ +/* { dg-options "-O1 -mdiv=call-fp" } */ +/* { dg-skip-if "" { "sh*-*-*" } { "*" } { "-m4*-single" "-m4*-single-only" } } */ + +#include <assert.h> +#include <stdlib.h> + +extern void __set_fpscr (int); + +void +write_xf0 (float* f) +{ + __asm__ __volatile__ ("frchg; fmov.s @%0,fr0; frchg" : : "r" (f) : "memory"); +} + +void +read_xf0 (float* f) +{ + __asm__ __volatile__ ("frchg; fmov.s fr0,@%0; frchg" : : "r" (f) : "memory"); +} + +int __attribute__ ((noinline)) +test_00 (int a, int b) +{ + return a / b; +} + +unsigned int __attribute__ ((noinline)) +test_01 (unsigned a, unsigned b) +{ + return a / b; +} + +int __attribute__ ((noinline)) +test_02 (int x) +{ + return x & 0; +} + +int +main (void) +{ + float test_value; + int r = 0; + + /* Set FPSCR.FR to 1. */ + __set_fpscr (0x200000); + + test_value = 123; + write_xf0 (&test_value); + r += test_00 (40, 4); + read_xf0 (&test_value); + assert (test_value == 123); + + test_value = 321; + write_xf0 (&test_value); + r += test_01 (50, 5); + read_xf0 (&test_value); + assert (test_value == 321); + + return test_02 (r); +} |