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| author | Robin Dapp <rdapp@ventanamicro.com> | 2025-01-21 18:07:41 +0100 |
|---|---|---|
| committer | Robin Dapp <rdapp@ventanamicro.com> | 2025-01-21 19:30:55 +0100 |
| commit | e324619281239bb513840600436b735dfbd32416 (patch) | |
| tree | 858dbc45d6289253d806305b53d52d8dd127c133 /gcc | |
| parent | 55d792542d21311e415daee333e2786ac5f150a7 (diff) | |
| download | gcc-e324619281239bb513840600436b735dfbd32416.zip gcc-e324619281239bb513840600436b735dfbd32416.tar.gz gcc-e324619281239bb513840600436b735dfbd32416.tar.bz2 | |
RISC-V: Unbreak bootstrap.
This fixes a wrong format specifier and an unused variable which should
re-enable bootstrap.
gcc/ChangeLog:
* config/riscv/riscv.cc (riscv_file_end): Fix format string.
(riscv_lshift_subword): Mark MODE as unused.
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/config/riscv/riscv.cc | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc index f5e672b..5a3a050 100644 --- a/gcc/config/riscv/riscv.cc +++ b/gcc/config/riscv/riscv.cc @@ -10375,7 +10375,7 @@ riscv_file_end () fprintf (asm_out_file, "\t.long\t4f - 3f\n"); fprintf (asm_out_file, "3:\n"); /* zicfiss, zicfilp. */ - fprintf (asm_out_file, "\t.long\t%x\n", feature_1_and); + fprintf (asm_out_file, "\t.long\t%lx\n", feature_1_and); fprintf (asm_out_file, "4:\n"); fprintf (asm_out_file, "\t.p2align\t%u\n", p2align); fprintf (asm_out_file, "5:\n"); @@ -11959,7 +11959,7 @@ riscv_subword_address (rtx mem, rtx *aligned_mem, rtx *shift, rtx *mask, /* Leftshift a subword within an SImode register. */ void -riscv_lshift_subword (machine_mode mode, rtx value, rtx shift, +riscv_lshift_subword (machine_mode mode ATTRIBUTE_UNUSED, rtx value, rtx shift, rtx *shifted_value) { rtx value_reg = gen_reg_rtx (SImode); |