RISC-V: Include pattern stmts for dynamic LMUL computation [PR114516].

When scanning for program points, i.e. vector statements, we're missing
pattern statements.  In PR114516 this becomes obvious as we choose
LMUL=8 assuming there are only three statements but the divmod pattern
adds another three.  Those push us beyond four registers so we need to
switch to LMUL=4.

This patch adds pattern statements to the program points which helps
calculate a better register pressure estimate.

	PR target/114516

gcc/ChangeLog:

	* config/riscv/riscv-vector-costs.cc (compute_estimated_lmul):
	Add pattern statements to program points.

gcc/testsuite/ChangeLog:

	* gcc.dg/vect/costmodel/riscv/rvv/pr114516.c: New test.

2 files changed, 58 insertions, 0 deletions

diff --git a/gcc/config/riscv/riscv-vector-costs.cc b/gcc/config/riscv/riscv-vector-costs.cc
index d4571b6..167375c 100644
--- a/gcc/config/riscv/riscv-vector-costs.cc
+++ b/gcc/config/riscv/riscv-vector-costs.cc
@@ -217,6 +217,35 @@ compute_local_program_points (
 				     "program point %d: %G", info.point,
 				     gsi_stmt (si));
 		}
+
+	      /* If the statement is part of a pattern, also add the other
+		 pattern statements.  */
+	      gimple_seq pattern_def_seq;
+	      if (STMT_VINFO_IN_PATTERN_P (stmt_info)
+		  && (pattern_def_seq = STMT_VINFO_PATTERN_DEF_SEQ (stmt_info)))
+		{
+		  gimple_stmt_iterator si2;
+
+		  for (si2 = gsi_start (pattern_def_seq);
+		       !gsi_end_p (si2);
+		       gsi_next (&si2))
+		    {
+		      stmt_vec_info pattern_def_stmt_info
+			= vinfo->lookup_stmt (gsi_stmt (si2));
+		      if (STMT_VINFO_RELEVANT_P (pattern_def_stmt_info)
+			  || STMT_VINFO_LIVE_P (pattern_def_stmt_info))
+			{
+			  stmt_point info = {point, gsi_stmt (si2),
+			      pattern_def_stmt_info};
+			  program_points.safe_push (info);
+			  point++;
+			  if (dump_enabled_p ())
+			    dump_printf_loc (MSG_NOTE, vect_location,
+					     "program point %d: %G",
+					     info.point, gsi_stmt (si2));
+			}
+		    }
+		}
 	    }
 	  program_points_per_bb.put (bb, program_points);
 	}
diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr114516.c b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr114516.c
new file mode 100644
index 0000000..55d036c
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr114516.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv_zba_zbb -mabi=lp64d -mrvv-max-lmul=dynamic -O3 -fdump-tree-vect-details" } */
+
+typedef float real_t;
+__attribute__((aligned(64))) real_t a[32000];
+real_t s315()
+{
+    for (int i = 0; i < 32000; i++)
+        a[i] = (i * 7) % 32000;
+    real_t x, chksum;
+    int index;
+    for (int nl = 0; nl < 256; nl++) {
+        x = a[0];
+        index = 0;
+        for (int i = 0; i < 32000; ++i) {
+            if (a[i] > x) {
+                x = a[i];
+                index = i;
+            }
+        }
+        chksum = x + (real_t) index;
+    }
+    return index + x + 1;
+}
+
+/* { dg-final { scan-assembler {e32,m4} } } */
+/* { dg-final { scan-assembler-not {e32,m8} } } */
+/* { dg-final { scan-assembler-not {csrr} } } */
+/* { dg-final { scan-tree-dump-times "Preferring smaller LMUL loop because it has unexpected spills" 1 "vect" } } */