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| author | Jeff Law <jlaw@ventanamicro.com> | 2025-02-06 12:37:11 -0700 |
|---|---|---|
| committer | Jeff Law <jlaw@ventanamicro.com> | 2025-02-06 12:37:11 -0700 |
| commit | 33e610110c933b0d65aa82d67864bb881768609f (patch) | |
| tree | 3963b1e3e39a8bcafe623d8fa502328ddba05201 /gcc | |
| parent | a69b728b5b9efa34d0af9f9ce0b248d05f7791b0 (diff) | |
| download | gcc-33e610110c933b0d65aa82d67864bb881768609f.zip gcc-33e610110c933b0d65aa82d67864bb881768609f.tar.gz gcc-33e610110c933b0d65aa82d67864bb881768609f.tar.bz2 | |
[RISC-V] Fix risc-v expected test output after recent iv changes
Richard S's recent change to iv increment insertion removed a reg->reg move
(which was its intent AFAICT). This triggered a failure on a riscv test.
That test was meant to verify that we didn't have an extraneous reg->reg move
due to a buglet in the risc-v splitters. Before the 2023 change we had two
vector reg->reg moves and after the 2023 fix we had just one. With Richard's
change we have none ;-) Adjusting test accordingly.
Pushed to the trunk.
gcc/testsuite
* gcc.target/riscv/rvv/autovec/madd-split2-1.c: Update expected
output.
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/testsuite/gcc.target/riscv/rvv/autovec/madd-split2-1.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/madd-split2-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/madd-split2-1.c index 4f99a5f..8cc0c9f 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/madd-split2-1.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/madd-split2-1.c @@ -10,4 +10,4 @@ foo (long *__restrict a, long *__restrict b, long n) return a[1]; } -/* { dg-final { scan-assembler-times {\tvmv1r\.v} 1 } } */ +/* { dg-final { scan-assembler-not {\tvmv1r\.v} } } */ |