testsuite: assorted targets: add missing braces to dg-* directives

These get ignored otherwise.

gcc/testsuite/ChangeLog:

	* gcc.target/arc/taux-1.c: Add missing brace.
	* gcc.target/arc/taux-2.c: Ditto.
	* gcc.target/i386/addr-space-1.c: Ditto.
	* gcc.target/ia64/mfused-madd-vect.c: Ditto.
	* gcc.target/ia64/mfused-madd.c: Ditto.
	* gcc.target/ia64/mno-fused-madd-vect.c: Ditto.
	* gcc.target/ia64/mno-fused-madd.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/merge-4.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls/merge-4.c: Ditto.
	* gcc.target/s390/target-attribute/tattr-1.c: Ditto.
	* gcc.target/s390/target-attribute/tattr-2.c: Ditto.

11 files changed, 11 insertions, 11 deletions

diff --git a/gcc/testsuite/gcc.target/arc/taux-1.c b/gcc/testsuite/gcc.target/arc/taux-1.c
index a2b7778..41b0fc4 100644
--- a/gcc/testsuite/gcc.target/arc/taux-1.c
+++ b/gcc/testsuite/gcc.target/arc/taux-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-O1 */
+/* { dg-options "-O1" } */
 
 
 #define __aux() __attribute__((aux))
diff --git a/gcc/testsuite/gcc.target/arc/taux-2.c b/gcc/testsuite/gcc.target/arc/taux-2.c
index 5644bcd..3e57ac8 100644
--- a/gcc/testsuite/gcc.target/arc/taux-2.c
+++ b/gcc/testsuite/gcc.target/arc/taux-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-O1 */
+/* { dg-options "-O1" } */
 
 #define __aux(r) __attribute__((aux(r)))
 static volatile __aux(0x1000) int var;
diff --git a/gcc/testsuite/gcc.target/i386/addr-space-1.c b/gcc/testsuite/gcc.target/i386/addr-space-1.c
index 1e13147..9a5ce9c 100644
--- a/gcc/testsuite/gcc.target/i386/addr-space-1.c
+++ b/gcc/testsuite/gcc.target/i386/addr-space-1.c
@@ -1,4 +1,4 @@
-/* { dg-do compile */
+/* { dg-do compile } */
 /* { dg-options "-O2" } */
 /* { dg-final { scan-assembler "movl\[ \t\]%gs:\\((%eax|%rax)\\), %eax" } } */
 
diff --git a/gcc/testsuite/gcc.target/ia64/mfused-madd-vect.c b/gcc/testsuite/gcc.target/ia64/mfused-madd-vect.c
index 5bf6976..d1dc3c1 100644
--- a/gcc/testsuite/gcc.target/ia64/mfused-madd-vect.c
+++ b/gcc/testsuite/gcc.target/ia64/mfused-madd-vect.c
@@ -1,4 +1,4 @@
-/* { dg-do compile */
+/* { dg-do compile } */
 /* { dg-options "-O2 -ftree-vectorize" } */
 /* { dg-final { scan-assembler-not "fpmpy" } } */
 
diff --git a/gcc/testsuite/gcc.target/ia64/mfused-madd.c b/gcc/testsuite/gcc.target/ia64/mfused-madd.c
index 8ecb31f..04fd95a 100644
--- a/gcc/testsuite/gcc.target/ia64/mfused-madd.c
+++ b/gcc/testsuite/gcc.target/ia64/mfused-madd.c
@@ -1,4 +1,4 @@
-/* { dg-do compile */
+/* { dg-do compile } */
 /* { dg-options "-O2" } */
 /* { dg-final { scan-assembler-not "fmpy" } } */
 /* { dg-final { scan-assembler-not "fadd" } } */
diff --git a/gcc/testsuite/gcc.target/ia64/mno-fused-madd-vect.c b/gcc/testsuite/gcc.target/ia64/mno-fused-madd-vect.c
index 10b047b..a80ce8b 100644
--- a/gcc/testsuite/gcc.target/ia64/mno-fused-madd-vect.c
+++ b/gcc/testsuite/gcc.target/ia64/mno-fused-madd-vect.c
@@ -1,4 +1,4 @@
-/* { dg-do compile */
+/* { dg-do compile } */
 /* { dg-options "-O2 -ffp-contract=off -ftree-vectorize" } */
 /* { dg-final { scan-assembler "fpmpy" } } */
 
diff --git a/gcc/testsuite/gcc.target/ia64/mno-fused-madd.c b/gcc/testsuite/gcc.target/ia64/mno-fused-madd.c
index 487519a..1f29225 100644
--- a/gcc/testsuite/gcc.target/ia64/mno-fused-madd.c
+++ b/gcc/testsuite/gcc.target/ia64/mno-fused-madd.c
@@ -1,4 +1,4 @@
-/* { dg-do compile */
+/* { dg-do compile } */
 /* { dg-options "-O2 -ffp-contract=off" } */
 /* { dg-final { scan-assembler-not "fma" } } */
 /* { dg-final { scan-assembler-not "fms" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/merge-4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/merge-4.c
index 3095a6d..a043b33 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/merge-4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/merge-4.c
@@ -119,4 +119,4 @@ merge10 (vnx16df x, vnx16df y, vnx16df *out)
   *(vnx16df*)out = v;
 }
 
-/* dg-final scan-assembler-times {\tvmerge.vvm} 11 */
+/* { dg-final { scan-assembler-times {\tvmerge.vvm} 11 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/merge-4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/merge-4.c
index 1dfd828..30ef22f 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/merge-4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/merge-4.c
@@ -3,6 +3,6 @@
 
 #include "../vls-vlmax/merge-4.c"
 
-/* dg-final scan-assembler-times {\tvmerge.vvm} 11 */
+/* { dg-final scan-assembler-times {\tvmerge.vvm} 11 } */
 /* { dg-final { scan-assembler-not {\tvms} } } */
 /* { dg-final { scan-assembler-times {\tvlm.v} 11 } } */
diff --git a/gcc/testsuite/gcc.target/s390/target-attribute/tattr-1.c b/gcc/testsuite/gcc.target/s390/target-attribute/tattr-1.c
index ff57344..7344af3 100644
--- a/gcc/testsuite/gcc.target/s390/target-attribute/tattr-1.c
+++ b/gcc/testsuite/gcc.target/s390/target-attribute/tattr-1.c
@@ -1,6 +1,6 @@
 /* Functional tests for the "target" attribute and pragma.  */
 
-/* { dg-do compile */
+/* { dg-do compile } */
 /* { dg-require-effective-target target_attribute } */
 /* { dg-options "-O3 -march=zEC12 -mzarch" } */
 
diff --git a/gcc/testsuite/gcc.target/s390/target-attribute/tattr-2.c b/gcc/testsuite/gcc.target/s390/target-attribute/tattr-2.c
index 739c2ea..3a6e4bb 100644
--- a/gcc/testsuite/gcc.target/s390/target-attribute/tattr-2.c
+++ b/gcc/testsuite/gcc.target/s390/target-attribute/tattr-2.c
@@ -1,6 +1,6 @@
 /* Functional tests for the "target" attribute and pragma.  */
 
-/* { dg-do compile */
+/* { dg-do compile } */
 /* { dg-require-effective-target target_attribute } */
 /* { dg-options "-O3 -march=zEC12 -mno-htm -fno-ipa-icf" } */