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| author | Jan Beulich <jbeulich@suse.com> | 2023-04-27 09:36:55 +0200 |
|---|---|---|
| committer | Jan Beulich <jbeulich@suse.com> | 2023-05-02 12:10:26 +0200 |
| commit | 867024b8905a824c1b59a0b6b4175e6da4040c65 (patch) | |
| tree | cc1b56af0003085f345bfeee08f412431b93e1c0 /gcc | |
| parent | 835a5796c39dcbd6ca4c167a317853d2a24495ff (diff) | |
| download | gcc-867024b8905a824c1b59a0b6b4175e6da4040c65.zip gcc-867024b8905a824c1b59a0b6b4175e6da4040c65.tar.gz gcc-867024b8905a824c1b59a0b6b4175e6da4040c65.tar.bz2 | |
testsuite: adjust NOP expectations for RISC-V
RISC-V will emit ".option nopic" when -fno-pie is in effect, which
matches the generic pattern. Just like done for Alpha, special-case
RISC-V.
gcc/testsuite/
* c-c++-common/patchable_function_entry-decl.c: Special-case
RISC-V.
* c-c++-common/patchable_function_entry-default.c: Likewise.
* c-c++-common/patchable_function_entry-definition.c: Likewise.
Diffstat (limited to 'gcc')
3 files changed, 6 insertions, 3 deletions
diff --git a/gcc/testsuite/c-c++-common/patchable_function_entry-decl.c b/gcc/testsuite/c-c++-common/patchable_function_entry-decl.c index 3ce7a5b..5137028 100644 --- a/gcc/testsuite/c-c++-common/patchable_function_entry-decl.c +++ b/gcc/testsuite/c-c++-common/patchable_function_entry-decl.c @@ -1,8 +1,9 @@ /* { dg-do compile { target { ! { nvptx*-*-* visium-*-* } } } } */ /* { dg-options "-O2 -fpatchable-function-entry=3,1" } */ /* { dg-additional-options "-fno-pie" { target sparc*-*-* } } */ -/* { dg-final { scan-assembler-times "nop|NOP|SWYM" 2 { target { ! { alpha*-*-* } } } } } */ +/* { dg-final { scan-assembler-times "nop|NOP|SWYM" 2 { target { ! { alpha*-*-* riscv*-*-* } } } } } */ /* { dg-final { scan-assembler-times "bis" 2 { target alpha*-*-* } } } */ +/* { dg-final { scan-assembler-times "nop\n" 2 { target riscv*-*-* } } } */ extern int a; diff --git a/gcc/testsuite/c-c++-common/patchable_function_entry-default.c b/gcc/testsuite/c-c++-common/patchable_function_entry-default.c index a501efc..3ccbafc 100644 --- a/gcc/testsuite/c-c++-common/patchable_function_entry-default.c +++ b/gcc/testsuite/c-c++-common/patchable_function_entry-default.c @@ -4,8 +4,9 @@ /* See PR99888, one single preceding nop isn't allowed on powerpc_elfv2, so overriding with two preceding nops to make it pass there. */ /* { dg-additional-options "-fpatchable-function-entry=3,2" { target powerpc_elfv2 } } */ -/* { dg-final { scan-assembler-times "nop|NOP|SWYM" 3 { target { ! { alpha*-*-* } } } } } */ +/* { dg-final { scan-assembler-times "nop|NOP|SWYM" 3 { target { ! { alpha*-*-* riscv*-*-* } } } } } */ /* { dg-final { scan-assembler-times "bis" 3 { target alpha*-*-* } } } */ +/* { dg-final { scan-assembler-times "nop\n" 3 { target riscv*-*-* } } } */ extern int a; diff --git a/gcc/testsuite/c-c++-common/patchable_function_entry-definition.c b/gcc/testsuite/c-c++-common/patchable_function_entry-definition.c index ad7d7a9..5ed356c 100644 --- a/gcc/testsuite/c-c++-common/patchable_function_entry-definition.c +++ b/gcc/testsuite/c-c++-common/patchable_function_entry-definition.c @@ -1,8 +1,9 @@ /* { dg-do compile { target { ! { nvptx*-*-* visium-*-* } } } } */ /* { dg-options "-O2 -fpatchable-function-entry=3,1" } */ /* { dg-additional-options "-fno-pie" { target sparc*-*-* } } */ -/* { dg-final { scan-assembler-times "nop|NOP|SWYM" 1 { target { ! { alpha*-*-* } } } } } */ +/* { dg-final { scan-assembler-times "nop|NOP|SWYM" 1 { target { ! { alpha*-*-* riscv*-*-* } } } } } */ /* { dg-final { scan-assembler-times "bis" 1 { target alpha*-*-* } } } */ +/* { dg-final { scan-assembler-times "nop\n" 1 { target riscv*-*-* } } } */ extern int a; |