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authorAndrew Stubbs <ams@codesourcery.com>2022-09-22 12:48:30 +0100
committerAndrew Stubbs <ams@codesourcery.com>2022-10-12 11:42:39 +0100
commita199fcd8bb00be552c49ea2ddc6510f6e383c3b7 (patch)
treed6b26bc576e92c29c91a3a2bff44761a35eff49c /gcc
parentdd528a4922fcf6c18548d0cb4789272793ebf1c1 (diff)
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amdgcn: Add vector integer negate insn
Another example of the vectorizer needing explicit insns where the scalar expander just works. gcc/ChangeLog: * config/gcn/gcn-valu.md (neg<mode>2): New define_expand.
Diffstat (limited to 'gcc')
-rw-r--r--gcc/ChangeLog.omp7
-rw-r--r--gcc/config/gcn/gcn-valu.md13
2 files changed, 20 insertions, 0 deletions
diff --git a/gcc/ChangeLog.omp b/gcc/ChangeLog.omp
index c388c48..7dcc220 100644
--- a/gcc/ChangeLog.omp
+++ b/gcc/ChangeLog.omp
@@ -3,6 +3,13 @@
Backport from mainline:
2022-10-11 Andrew Stubbs <ams@codesourcery.com>
+ * config/gcn/gcn-valu.md (neg<mode>2): New define_expand.
+
+2022-10-12 Andrew Stubbs <ams@codesourcery.com>
+
+ Backport from mainline:
+ 2022-10-11 Andrew Stubbs <ams@codesourcery.com>
+
* config/gcn/gcn-valu.md (vec_init<V_ALL:mode><V_ALL_ALT:mode>): New.
* config/gcn/gcn.cc (GEN_VN): Add andvNsi3, subvNsi3.
(GEN_VNM): Add gathervNm_expr.
diff --git a/gcc/config/gcn/gcn-valu.md b/gcc/config/gcn/gcn-valu.md
index 3e7434a..9691ff4 100644
--- a/gcc/config/gcn/gcn-valu.md
+++ b/gcc/config/gcn/gcn-valu.md
@@ -2394,6 +2394,19 @@
(set_attr "length" "8,8")])
;; }}}
+;; {{{ Int unops
+
+(define_expand "neg<mode>2"
+ [(match_operand:V_INT 0 "register_operand")
+ (match_operand:V_INT 1 "register_operand")]
+ ""
+ {
+ emit_insn (gen_sub<mode>3 (operands[0], gcn_vec_constant (<MODE>mode, 0),
+ operands[1]));
+ DONE;
+ })
+
+;; }}}
;; {{{ FP binops - special cases
; GCN does not directly provide a DFmode subtract instruction, so we do it by