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| author | liuhongt <hongtao.liu@intel.com> | 2024-09-10 15:04:58 +0800 |
|---|---|---|
| committer | liuhongt <hongtao.liu@intel.com> | 2024-09-11 09:17:06 +0800 |
| commit | f80e4ba94e41410219bdcdb1a0f204ea3f148666 (patch) | |
| tree | 110af9e0ff2d98dc8dc26ab15c1f3b9ac7a51ce9 /gcc | |
| parent | 6bd3ee7f2f2f4beed5b9d9a530736ad69d2cac42 (diff) | |
| download | gcc-f80e4ba94e41410219bdcdb1a0f204ea3f148666.zip gcc-f80e4ba94e41410219bdcdb1a0f204ea3f148666.tar.gz gcc-f80e4ba94e41410219bdcdb1a0f204ea3f148666.tar.bz2 | |
Enable tune fuse_move_and_alu for GNR.
According to Intel Software Optimization Manual[1], the Redwood cove
microarchitecture supports LD+OP and MOV+OP macro fusions.
The patch enables MOV+OP tune for GNR.
[1] https://www.intel.com/content/www/us/en/content-details/814198/intel-64-and-ia-32-architectures-optimization-reference-manual-volume-1.html
gcc/ChangeLog:
* config/i386/x86-tune.def (X86_TUNE_FUSE_MOV_AND_ALU): Enable
for GNR and GNR-D.
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/config/i386/x86-tune.def | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/gcc/config/i386/x86-tune.def b/gcc/config/i386/x86-tune.def index d7e2ad7..3d123da 100644 --- a/gcc/config/i386/x86-tune.def +++ b/gcc/config/i386/x86-tune.def @@ -153,7 +153,8 @@ DEF_TUNE (X86_TUNE_FUSE_ALU_AND_BRANCH, "fuse_alu_and_branch", /* X86_TUNE_FUSE_MOV_AND_ALU: mov and alu in case mov is reg-reg mov and the destination is used by alu. alu must be one of ADD, ADC, AND, XOR, OR, SUB, SBB, INC, DEC, NOT, SAL, SHL, SHR, SAR. */ -DEF_TUNE (X86_TUNE_FUSE_MOV_AND_ALU, "fuse_mov_and_alu", m_ZNVER5) +DEF_TUNE (X86_TUNE_FUSE_MOV_AND_ALU, "fuse_mov_and_alu", + m_ZNVER5 | m_GRANITERAPIDS | m_GRANITERAPIDS_D) /*****************************************************************************/ /* Function prologue, epilogue and function calling sequences. */ |