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| author | Christophe Lyon <christophe.lyon@arm.com> | 2023-01-10 16:15:00 +0000 |
|---|---|---|
| committer | Christophe Lyon <christophe.lyon@arm.com> | 2023-05-03 16:58:28 +0200 |
| commit | dd04568f4ed39ce4c6d402729762ffbcc0340a8a (patch) | |
| tree | add6b78432ee3234b780077c7d777ddd521ed06d /gcc | |
| parent | 4545ca8bc32d98edf7b0d87939c81a406289a955 (diff) | |
| download | gcc-dd04568f4ed39ce4c6d402729762ffbcc0340a8a.zip gcc-dd04568f4ed39ce4c6d402729762ffbcc0340a8a.tar.gz gcc-dd04568f4ed39ce4c6d402729762ffbcc0340a8a.tar.bz2 | |
arm: [MVE intrinsics] factorize vcreateq
We need a 'fake' iterator to be able to use mve_insn for vcreateq_f.
2022-09-08 Christophe Lyon <christophe.lyon@arm.com>
gcc/
* config/arm/iterators.md (MVE_FP_CREATE_ONLY): New.
(mve_insn): Add VCREATEQ_S, VCREATEQ_U, VCREATEQ_F.
* config/arm/mve.md (mve_vcreateq_f<mode>): Rename into ...
(@mve_<mve_insn>q_f<mode>): ... this.
(mve_vcreateq_<supf><mode>): Rename into ...
(@mve_<mve_insn>q_<supf><mode>): ... this.
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/config/arm/iterators.md | 5 | ||||
| -rw-r--r-- | gcc/config/arm/mve.md | 6 |
2 files changed, 8 insertions, 3 deletions
diff --git a/gcc/config/arm/iterators.md b/gcc/config/arm/iterators.md index b0ea1af..aa2ee98 100644 --- a/gcc/config/arm/iterators.md +++ b/gcc/config/arm/iterators.md @@ -393,6 +393,10 @@ VSUBQ_N_F ]) +(define_int_iterator MVE_FP_CREATE_ONLY [ + VCREATEQ_F + ]) + (define_code_attr mve_addsubmul [ (minus "vsub") (mult "vmul") @@ -407,6 +411,7 @@ (VBICQ_M_N_S "vbic") (VBICQ_M_N_U "vbic") (VBICQ_M_S "vbic") (VBICQ_M_U "vbic") (VBICQ_M_F "vbic") (VBICQ_N_S "vbic") (VBICQ_N_U "vbic") + (VCREATEQ_S "vcreate") (VCREATEQ_U "vcreate") (VCREATEQ_F "vcreate") (VEORQ_M_S "veor") (VEORQ_M_U "veor") (VEORQ_M_F "veor") (VMULQ_M_N_S "vmul") (VMULQ_M_N_U "vmul") (VMULQ_M_N_F "vmul") (VMULQ_M_S "vmul") (VMULQ_M_U "vmul") (VMULQ_M_F "vmul") diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md index 4eacd4b..8592e4a 100644 --- a/gcc/config/arm/mve.md +++ b/gcc/config/arm/mve.md @@ -700,12 +700,12 @@ ;; [vcreateq_f]) ;; -(define_insn "mve_vcreateq_f<mode>" +(define_insn "@mve_<mve_insn>q_f<mode>" [ (set (match_operand:MVE_0 0 "s_register_operand" "=w") (unspec:MVE_0 [(match_operand:DI 1 "s_register_operand" "r") (match_operand:DI 2 "s_register_operand" "r")] - VCREATEQ_F)) + MVE_FP_CREATE_ONLY)) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" "vmov %q0[2], %q0[0], %Q1, %Q2\;vmov %q0[3], %q0[1], %R1, %R2" @@ -715,7 +715,7 @@ ;; ;; [vcreateq_u, vcreateq_s]) ;; -(define_insn "mve_vcreateq_<supf><mode>" +(define_insn "@mve_<mve_insn>q_<supf><mode>" [ (set (match_operand:MVE_1 0 "s_register_operand" "=w") (unspec:MVE_1 [(match_operand:DI 1 "s_register_operand" "r") |