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authorHu, Lin1 <lin1.hu@intel.com>2024-08-19 10:09:11 +0800
committerHaochen Jiang <haochen.jiang@intel.com>2024-08-19 10:16:48 +0800
commit8d4f542935c09f40bb7fd8fd863cc8df80cc970e (patch)
tree2ea0dd1c2d00a6f86675348c049bd69867ee5475 /gcc
parent0983d406ae2e84394b25248865f51c686b119a57 (diff)
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AVX10.2 ymm rounding: Support vgetexpp{s,d,h} and vgetmantp{s,d,h} intrins
gcc/ChangeLog: * config/i386/avx10_2roundingintrin.h: New intrins. * config/i386/i386-builtin-types.def: Add new DEF_FUNCTION_TYPE. * config/i386/i386-builtin.def (BDESC): Add new builtins. * config/i386/i386-expand.cc (ix86_expand_round_builtin): Handle V8SF_FTYPE_V8SF_V8SF_UQI_INT, V4DF_FTYPE_V4DF_V4DF_UQI_INT, V16HF_FTYPE_V16HF_V16HF_UHI_INT, V16HF_FTYPE_V16HF_INT_V16HF_UHI_INT, V4DF_FTYPE_V4DF_INT_V4DF_UQI_INT, V8SF_FTYPE_V8SF_INT_V8SF_UQI_INT. * config/i386/sse.md: (<avx512>_getexp<mode><mask_name><round_saeonly_name>): Add condition check. (<avx512>_getmant<mode><mask_name><round_saeonly_name>): Ditto. gcc/testsuite/ChangeLog: * gcc.target/i386/avx-1.c: Add new builtin test. * gcc.target/i386/sse-13.c: Ditto. * gcc.target/i386/sse-14.c: Ditto. * gcc.target/i386/sse-22.c: Add new macro test. * gcc.target/i386/sse-23.c: Ditto. * gcc.target/i386/avx10_2-rounding-3.c: Add test.
Diffstat (limited to 'gcc')
-rw-r--r--gcc/config/i386/avx10_2roundingintrin.h341
-rw-r--r--gcc/config/i386/i386-builtin-types.def6
-rw-r--r--gcc/config/i386/i386-builtin.def6
-rw-r--r--gcc/config/i386/i386-expand.cc6
-rw-r--r--gcc/config/i386/sse.md4
-rw-r--r--gcc/testsuite/gcc.target/i386/avx-1.c6
-rw-r--r--gcc/testsuite/gcc.target/i386/avx10_2-rounding-3.c59
-rw-r--r--gcc/testsuite/gcc.target/i386/sse-13.c6
-rw-r--r--gcc/testsuite/gcc.target/i386/sse-14.c18
-rw-r--r--gcc/testsuite/gcc.target/i386/sse-22.c18
-rw-r--r--gcc/testsuite/gcc.target/i386/sse-23.c6
11 files changed, 474 insertions, 2 deletions
diff --git a/gcc/config/i386/avx10_2roundingintrin.h b/gcc/config/i386/avx10_2roundingintrin.h
index afc1220..07729a6 100644
--- a/gcc/config/i386/avx10_2roundingintrin.h
+++ b/gcc/config/i386/avx10_2roundingintrin.h
@@ -3021,6 +3021,217 @@ _mm256_maskz_fnmsub_round_ps (__mmask8 __U, __m256 __A, __m256 __B,
(__mmask8) __U,
__R);
}
+
+extern __inline __m256d
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_getexp_round_pd (__m256d __A, const int __R)
+{
+ return
+ (__m256d) __builtin_ia32_getexppd256_mask_round ((__v4df) __A,
+ (__v4df)
+ _mm256_undefined_pd (),
+ (__mmask8) -1,
+ __R);
+}
+
+extern __inline __m256d
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_getexp_round_pd (__m256d __W, __mmask8 __U, __m256d __A,
+ const int __R)
+{
+ return (__m256d) __builtin_ia32_getexppd256_mask_round ((__v4df) __A,
+ (__v4df) __W,
+ (__mmask8) __U,
+ __R);
+}
+
+extern __inline __m256d
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_maskz_getexp_round_pd (__mmask8 __U, __m256d __A, const int __R)
+{
+ return (__m256d) __builtin_ia32_getexppd256_mask_round ((__v4df) __A,
+ (__v4df)
+ _mm256_setzero_pd (),
+ (__mmask8) __U,
+ __R);
+}
+
+extern __inline __m256h
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_getexp_round_ph (__m256h __A, const int __R)
+{
+ return (__m256h) __builtin_ia32_getexpph256_mask_round ((__v16hf) __A,
+ (__v16hf)
+ _mm256_setzero_ph (),
+ (__mmask16) -1,
+ __R);
+}
+
+extern __inline __m256h
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_getexp_round_ph (__m256h __W, __mmask16 __U, __m256h __A,
+ const int __R)
+{
+ return (__m256h) __builtin_ia32_getexpph256_mask_round ((__v16hf) __A,
+ (__v16hf) __W,
+ (__mmask16) __U,
+ __R);
+}
+
+extern __inline __m256h
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_maskz_getexp_round_ph (__mmask16 __U, __m256h __A, const int __R)
+{
+ return (__m256h) __builtin_ia32_getexpph256_mask_round ((__v16hf) __A,
+ (__v16hf)
+ _mm256_setzero_ph (),
+ (__mmask16) __U,
+ __R);
+}
+
+extern __inline __m256
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_getexp_round_ps (__m256 __A, const int __R)
+{
+ return (__m256) __builtin_ia32_getexpps256_mask_round ((__v8sf) __A,
+ (__v8sf)
+ _mm256_undefined_ps (),
+ (__mmask8) -1,
+ __R);
+}
+
+extern __inline __m256
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_getexp_round_ps (__m256 __W, __mmask8 __U, __m256 __A,
+ const int __R)
+{
+ return (__m256) __builtin_ia32_getexpps256_mask_round ((__v8sf) __A,
+ (__v8sf) __W,
+ (__mmask8) __U,
+ __R);
+}
+
+extern __inline __m256
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_maskz_getexp_round_ps (__mmask8 __U, __m256 __A, const int __R)
+{
+ return (__m256) __builtin_ia32_getexpps256_mask_round ((__v8sf) __A,
+ (__v8sf)
+ _mm256_setzero_ps (),
+ (__mmask8) __U,
+ __R);
+}
+
+extern __inline __m256d
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_getmant_round_pd (__m256d __A, _MM_MANTISSA_NORM_ENUM __B,
+ _MM_MANTISSA_SIGN_ENUM __C, const int __R)
+{
+ return
+ (__m256d) __builtin_ia32_getmantpd256_mask_round ((__v4df) __A,
+ (__C << 2) | __B,
+ _mm256_undefined_pd (),
+ (__mmask8) -1, __R);
+}
+
+extern __inline __m256d
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_getmant_round_pd (__m256d __W, __mmask8 __U, __m256d __A,
+ _MM_MANTISSA_NORM_ENUM __B,
+ _MM_MANTISSA_SIGN_ENUM __C, const int __R)
+{
+ return (__m256d) __builtin_ia32_getmantpd256_mask_round ((__v4df) __A,
+ (__C << 2) | __B,
+ (__v4df) __W, __U,
+ __R);
+}
+
+extern __inline __m256d
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_maskz_getmant_round_pd (__mmask8 __U, __m256d __A,
+ _MM_MANTISSA_NORM_ENUM __B,
+ _MM_MANTISSA_SIGN_ENUM __C, const int __R)
+{
+ return (__m256d) __builtin_ia32_getmantpd256_mask_round ((__v4df) __A,
+ (__C << 2) | __B,
+ (__v4df)
+ _mm256_setzero_pd (),
+ __U, __R);
+}
+
+extern __inline __m256h
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_getmant_round_ph (__m256h __A, _MM_MANTISSA_NORM_ENUM __B,
+ _MM_MANTISSA_SIGN_ENUM __C, const int __R)
+{
+ return
+ (__m256h) __builtin_ia32_getmantph256_mask_round ((__v16hf) __A,
+ (__C << 2) | __B,
+ _mm256_undefined_ph (),
+ (__mmask16) -1, __R);
+}
+
+extern __inline __m256h
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_getmant_round_ph (__m256h __W, __mmask16 __U, __m256h __A,
+ _MM_MANTISSA_NORM_ENUM __B,
+ _MM_MANTISSA_SIGN_ENUM __C, const int __R)
+{
+ return (__m256h) __builtin_ia32_getmantph256_mask_round ((__v16hf) __A,
+ (__C << 2) | __B,
+ (__v16hf) __W, __U,
+ __R);
+}
+
+extern __inline __m256h
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_maskz_getmant_round_ph (__mmask8 __U, __m256h __A,
+ _MM_MANTISSA_NORM_ENUM __B,
+ _MM_MANTISSA_SIGN_ENUM __C, const int __R)
+{
+ return (__m256h) __builtin_ia32_getmantph256_mask_round ((__v16hf) __A,
+ (__C << 2) | __B,
+ (__v16hf)
+ _mm256_setzero_ph (),
+ __U, __R);
+}
+
+extern __inline __m256
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_getmant_round_ps (__m256 __A, _MM_MANTISSA_NORM_ENUM __B,
+ _MM_MANTISSA_SIGN_ENUM __C, const int __R)
+{
+ return
+ (__m256) __builtin_ia32_getmantps256_mask_round ((__v8sf) __A,
+ (__C << 2) | __B,
+ _mm256_undefined_ps (),
+ (__mmask8) -1, __R);
+}
+
+extern __inline __m256
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_getmant_round_ps (__m256 __W, __mmask8 __U, __m256 __A,
+ _MM_MANTISSA_NORM_ENUM __B,
+ _MM_MANTISSA_SIGN_ENUM __C, const int __R)
+{
+ return (__m256) __builtin_ia32_getmantps256_mask_round ((__v8sf) __A,
+ (__C << 2) | __B,
+ (__v8sf) __W, __U,
+ __R);
+}
+
+extern __inline __m256
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_maskz_getmant_round_ps (__mmask8 __U, __m256 __A,
+ _MM_MANTISSA_NORM_ENUM __B,
+ _MM_MANTISSA_SIGN_ENUM __C, const int __R)
+{
+ return (__m256) __builtin_ia32_getmantps256_mask_round ((__v8sf) __A,
+ (__C << 2) | __B,
+ (__v8sf)
+ _mm256_setzero_ps (),
+ __U, __R);
+}
#else
#define _mm256_add_round_pd(A, B, R) \
((__m256d) __builtin_ia32_addpd256_mask_round ((__v4df) (A), \
@@ -4509,6 +4720,136 @@ _mm256_maskz_fnmsub_round_ps (__mmask8 __U, __m256 __A, __m256 __B,
#define _mm256_maskz_fnmsub_round_ps(U, A, B, D, R) \
(__m256)__builtin_ia32_vfnmsubps256_maskz_round (A, B, D, U, R)
+
+#define _mm256_getexp_round_pd(A, R) \
+ ((__m256d) __builtin_ia32_getexppd256_mask_round ((__v4df) (A), \
+ (__v4df) \
+ (_mm256_undefined_pd ()), \
+ (__mmask8) (-1), \
+ (R)))
+
+#define _mm256_mask_getexp_round_pd(W, U, A, R) \
+ ((__m256d) __builtin_ia32_getexppd256_mask_round ((__v4df) (A), \
+ (__v4df) (W), \
+ (__mmask8) (U), \
+ (R)))
+
+#define _mm256_maskz_getexp_round_pd(U, A, R) \
+ ((__m256d) __builtin_ia32_getexppd256_mask_round ((__v4df) (A), \
+ (__v4df) \
+ (_mm256_setzero_pd ()), \
+ (__mmask8) (U), \
+ (R)))
+
+#define _mm256_getexp_round_ph(A, R)\
+ ((__m256h) __builtin_ia32_getexpph256_mask_round ((__v16hf) (A), \
+ (__v16hf) \
+ (_mm256_setzero_ph ()), \
+ (__mmask16) (-1), \
+ (R)))
+
+#define _mm256_mask_getexp_round_ph(W, U, A, R)\
+ ((__m256h) __builtin_ia32_getexpph256_mask_round ((__v16hf) (A), \
+ (__v16hf) (W), \
+ (__mmask16) (U), \
+ (R)))
+
+#define _mm256_maskz_getexp_round_ph(U, A, R)\
+ ((__m256h) __builtin_ia32_getexpph256_mask_round ((__v16hf) (A), \
+ (__v16hf) \
+ (_mm256_setzero_ph ()), \
+ (__mmask16) (U), \
+ (R)))
+
+#define _mm256_getexp_round_ps(A, R)\
+ ((__m256) __builtin_ia32_getexpps256_mask_round ((__v8sf) (A), \
+ (__v8sf) \
+ (_mm256_undefined_ps ()), \
+ (__mmask8) (-1), \
+ (R)))
+
+#define _mm256_mask_getexp_round_ps(W, U, A, R)\
+ ((__m256) __builtin_ia32_getexpps256_mask_round ((__v8sf) (A), \
+ (__v8sf) (W), \
+ (__mmask8) (U), \
+ (R)))
+
+#define _mm256_maskz_getexp_round_ps(U, A, R)\
+ ((__m256) __builtin_ia32_getexpps256_mask_round ((__v8sf) (A), \
+ (__v8sf) \
+ (_mm256_setzero_ps ()), \
+ (__mmask8) (U), \
+ (R)))
+
+#define _mm256_getmant_round_pd(A, B, C, R) \
+ ((__m256d)__builtin_ia32_getmantpd256_mask_round ((__v4df) (__m256d) (A), \
+ (int) (((C) << 2) | (B)), \
+ (__v4df) (__m256d) \
+ _mm256_undefined_pd (), \
+ (__mmask8)-1, \
+ (R)))
+
+#define _mm256_mask_getmant_round_pd(W, U, A, B, C, R) \
+ ((__m256d)__builtin_ia32_getmantpd256_mask_round ((__v4df) (__m256d) (A), \
+ (int) (((C) << 2) | (B)), \
+ (__v4df) (__m256d) (W), \
+ (__mmask8) (U), \
+ (R)))
+
+#define _mm256_maskz_getmant_round_pd(U, A, B, C, R) \
+ ((__m256d)__builtin_ia32_getmantpd256_mask_round ((__v4df) (__m256d) (A), \
+ (int) (((C) << 2) | (B)), \
+ (__v4df) (__m256d) \
+ _mm256_setzero_pd (), \
+ (__mmask8) (U), \
+ (R)))
+
+
+#define _mm256_getmant_round_ph(A, B, C, R) \
+ ((__m256h)__builtin_ia32_getmantph256_mask_round ((__v16hf) (__m256h) (A), \
+ (int) (((C)<<2) | (B)), \
+ (__v16hf) (__m256h) \
+ _mm256_undefined_ph (), \
+ (__mmask16)-1, \
+ (R)))
+
+#define _mm256_mask_getmant_round_ph(W, U, A, B, C, R) \
+ ((__m256h)__builtin_ia32_getmantph256_mask_round ((__v16hf) (__m256h) (A), \
+ (int) (((C)<<2) | (B)), \
+ (__v16hf) (__m256h) (W), \
+ (__mmask16) (U), \
+ (R)))
+
+#define _mm256_maskz_getmant_round_ph(U, A, B, C, R) \
+ ((__m256h)__builtin_ia32_getmantph256_mask_round ((__v16hf) (__m256h) (A), \
+ (int) (((C)<<2) | (B)), \
+ (__v16hf) (__m256h) \
+ _mm256_setzero_ph (), \
+ (__mmask16) (U), \
+ (R)))
+
+#define _mm256_getmant_round_ps(A, B, C, R) \
+ ((__m256)__builtin_ia32_getmantps256_mask_round ((__v8sf) (__m256) (A), \
+ (int) (((C)<<2) | (B)), \
+ (__v8sf) (__m256) \
+ _mm256_undefined_ps (), \
+ (__mmask8)-1, \
+ (R)))
+
+#define _mm256_mask_getmant_round_ps(W, U, A, B, C, R) \
+ ((__m256)__builtin_ia32_getmantps256_mask_round ((__v8sf) (__m256) (A), \
+ (int) (((C)<<2) | (B)), \
+ (__v8sf) (__m256) (W), \
+ (__mmask8) (U), \
+ (R)))
+
+#define _mm256_maskz_getmant_round_ps(U, A, B, C, R) \
+ ((__m256)__builtin_ia32_getmantps256_mask_round ((__v8sf) (__m256) (A), \
+ (int) (((C)<<2) | (B)), \
+ (__v8sf) (__m256) \
+ _mm256_setzero_ps (), \
+ (__mmask8) (U), \
+ (R)))
#endif
#define _mm256_cmul_round_pch(A, B, R) _mm256_fcmul_round_pch ((A), (B), (R))
diff --git a/gcc/config/i386/i386-builtin-types.def b/gcc/config/i386/i386-builtin-types.def
index fc5c65e..738cb78 100644
--- a/gcc/config/i386/i386-builtin-types.def
+++ b/gcc/config/i386/i386-builtin-types.def
@@ -1445,3 +1445,9 @@ DEF_FUNCTION_TYPE (V16HF, V16HF, V16HF, V16HF, UQI, INT)
DEF_FUNCTION_TYPE (V4DF, V4DF, V4DF, V4DI, INT, UQI, INT)
DEF_FUNCTION_TYPE (V8SF, V8SF, V8SF, V8SI, INT, UQI, INT)
DEF_FUNCTION_TYPE (V16HF, V16HF, V16HF, INT)
+DEF_FUNCTION_TYPE (V4DF, V4DF, V4DF, UQI, INT)
+DEF_FUNCTION_TYPE (V16HF, V16HF, V16HF, UHI, INT)
+DEF_FUNCTION_TYPE (V8SF, V8SF, V8SF, UQI, INT)
+DEF_FUNCTION_TYPE (V4DF, V4DF, INT, V4DF, UQI, INT)
+DEF_FUNCTION_TYPE (V16HF, V16HF, INT, V16HF, UHI, INT)
+DEF_FUNCTION_TYPE (V8SF, V8SF, INT, V8SF, UQI, INT)
diff --git a/gcc/config/i386/i386-builtin.def b/gcc/config/i386/i386-builtin.def
index 74a8c60..d538053 100644
--- a/gcc/config/i386/i386-builtin.def
+++ b/gcc/config/i386/i386-builtin.def
@@ -3445,6 +3445,12 @@ BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx512vl_fnmsub_v16hf_maskz_rou
BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx512vl_fnmsub_v8sf_mask_round, "__builtin_ia32_vfnmsubps256_mask_round", IX86_BUILTIN_VFNMSUBPS256_MASK_ROUND, UNKNOWN, (int) V8SF_FTYPE_V8SF_V8SF_V8SF_UQI_INT)
BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx512vl_fnmsub_v8sf_mask3_round, "__builtin_ia32_vfnmsubps256_mask3_round", IX86_BUILTIN_VFNMSUBPS512_MASK3_ROUND, UNKNOWN, (int) V8SF_FTYPE_V8SF_V8SF_V8SF_UQI_INT)
BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx512vl_fnmsub_v8sf_maskz_round, "__builtin_ia32_vfnmsubps256_maskz_round", IX86_BUILTIN_VFNMSUBPS256_MASKZ_ROUND, UNKNOWN, (int) V8SF_FTYPE_V8SF_V8SF_V8SF_UQI_INT)
+BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx512vl_getexpv4df_mask_round, "__builtin_ia32_getexppd256_mask_round", IX86_BUILTIN_VGETEXPPD256_MASK_ROUND, UNKNOWN, (int) V4DF_FTYPE_V4DF_V4DF_UQI_INT)
+BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx512vl_getexpv16hf_mask_round, "__builtin_ia32_getexpph256_mask_round", IX86_BUILTIN_VGETEXPPH256_MASK_ROUND, UNKNOWN, (int) V16HF_FTYPE_V16HF_V16HF_UHI_INT)
+BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx512vl_getexpv8sf_mask_round, "__builtin_ia32_getexpps256_mask_round", IX86_BUILTIN_VGETEXPPS256_MASK_ROUND, UNKNOWN, (int) V8SF_FTYPE_V8SF_V8SF_UQI_INT)
+BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx512vl_getmantv4df_mask_round, "__builtin_ia32_getmantpd256_mask_round", IX86_BUILTIN_VGETMANTPD256_MASK_ROUND, UNKNOWN, (int) V4DF_FTYPE_V4DF_INT_V4DF_UQI_INT)
+BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx512vl_getmantv16hf_mask_round, "__builtin_ia32_getmantph256_mask_round", IX86_BUILTIN_VGETMANTPH256_MASK_ROUND, UNKNOWN, (int) V16HF_FTYPE_V16HF_INT_V16HF_UHI_INT)
+BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx512vl_getmantv8sf_mask_round, "__builtin_ia32_getmantps256_mask_round", IX86_BUILTIN_VGETMANTPS256_MASK_ROUND, UNKNOWN, (int) V8SF_FTYPE_V8SF_INT_V8SF_UQI_INT)
BDESC_END (ROUND_ARGS, MULTI_ARG)
diff --git a/gcc/config/i386/i386-expand.cc b/gcc/config/i386/i386-expand.cc
index 251b443..a8851ff 100644
--- a/gcc/config/i386/i386-expand.cc
+++ b/gcc/config/i386/i386-expand.cc
@@ -12404,10 +12404,12 @@ ix86_expand_round_builtin (const struct builtin_description *d,
case V16HI_FTYPE_V16HF_V16HI_UHI_INT:
case V8DF_FTYPE_V8SF_V8DF_QI_INT:
case V16SF_FTYPE_V16HI_V16SF_HI_INT:
+ case V8SF_FTYPE_V8SF_V8SF_UQI_INT:
case V8SF_FTYPE_V8SI_V8SF_UQI_INT:
case V8SF_FTYPE_V8HF_V8SF_UQI_INT:
case V8SI_FTYPE_V8SF_V8SI_UQI_INT:
case V8SI_FTYPE_V8HF_V8SI_UQI_INT:
+ case V4DF_FTYPE_V4DF_V4DF_UQI_INT:
case V4DF_FTYPE_V4DI_V4DF_UQI_INT:
case V4DF_FTYPE_V4SF_V4DF_UQI_INT:
case V4DF_FTYPE_V8HF_V4DF_UQI_INT:
@@ -12426,6 +12428,7 @@ ix86_expand_round_builtin (const struct builtin_description *d,
case V8HF_FTYPE_V4DF_V8HF_UQI_INT:
case V8HF_FTYPE_V4DI_V8HF_UQI_INT:
case V16HF_FTYPE_V16SF_V16HF_UHI_INT:
+ case V16HF_FTYPE_V16HF_V16HF_UHI_INT:
case V16HF_FTYPE_V16HI_V16HF_UHI_INT:
case V8HF_FTYPE_V8HF_V8HF_V8HF_INT:
nargs = 4;
@@ -12466,6 +12469,9 @@ ix86_expand_round_builtin (const struct builtin_description *d,
case V8DF_FTYPE_V8DF_INT_V8DF_QI_INT:
case V8DF_FTYPE_V8DF_INT_V8DF_UQI_INT:
case V16SF_FTYPE_V16SF_INT_V16SF_UHI_INT:
+ case V16HF_FTYPE_V16HF_INT_V16HF_UHI_INT:
+ case V4DF_FTYPE_V4DF_INT_V4DF_UQI_INT:
+ case V8SF_FTYPE_V8SF_INT_V8SF_UQI_INT:
nargs_constant = 4;
nargs = 5;
break;
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index 0881a43..61ec8ef 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -13741,7 +13741,7 @@
[(set (match_operand:VFH_AVX512VL 0 "register_operand" "=v")
(unspec:VFH_AVX512VL [(match_operand:VFH_AVX512VL 1 "<round_saeonly_nimm_predicate>" "<round_saeonly_constraint>")]
UNSPEC_GETEXP))]
- "TARGET_AVX512F"
+ "TARGET_AVX512F && <round_saeonly_mode_condition>"
"vgetexp<ssemodesuffix>\t{<round_saeonly_mask_op2>%1, %0<mask_operand2>|%0<mask_operand2>, %1<round_saeonly_mask_op2>}";
[(set_attr "prefix" "evex")
(set_attr "mode" "<MODE>")])
@@ -29584,7 +29584,7 @@
[(match_operand:VFH_AVX512VL 1 "nonimmediate_operand" "<round_saeonly_constraint>")
(match_operand:SI 2 "const_0_to_15_operand")]
UNSPEC_GETMANT))]
- "TARGET_AVX512F"
+ "TARGET_AVX512F && <round_saeonly_mode_condition>"
{
if (TARGET_DEST_FALSE_DEP_FOR_GLC
&& <mask3_dest_false_dep_for_glc_cond>
diff --git a/gcc/testsuite/gcc.target/i386/avx-1.c b/gcc/testsuite/gcc.target/i386/avx-1.c
index 00991c3..4ce0098 100644
--- a/gcc/testsuite/gcc.target/i386/avx-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx-1.c
@@ -969,6 +969,12 @@
#define __builtin_ia32_vfnmsubps256_mask_round(A, B, C, D, E) __builtin_ia32_vfnmsubps256_mask_round(A, B, C, D, 8)
#define __builtin_ia32_vfnmsubps256_mask3_round(A, B, C, D, E) __builtin_ia32_vfnmsubps256_mask3_round(A, B, C, D, 8)
#define __builtin_ia32_vfnmsubps256_maskz_round(A, B, C, D, E) __builtin_ia32_vfnmsubps256_maskz_round(A, B, C, D, 8)
+#define __builtin_ia32_getexppd256_mask_round(A, B, C, D) __builtin_ia32_getexppd256_mask_round(A, B, C, 8)
+#define __builtin_ia32_getexpph256_mask_round(A, B, C, D) __builtin_ia32_getexpph256_mask_round(A, B, C, 8)
+#define __builtin_ia32_getexpps256_mask_round(A, B, C, D) __builtin_ia32_getexpps256_mask_round(A, B, C, 8)
+#define __builtin_ia32_getmantpd256_mask_round(A, F, C, D, E) __builtin_ia32_getmantpd256_mask_round(A, 1, C, D, 8)
+#define __builtin_ia32_getmantph256_mask_round(A, F, C, D, E) __builtin_ia32_getmantph256_mask_round(A, 1, C, D, 8)
+#define __builtin_ia32_getmantps256_mask_round(A, F, C, D, E) __builtin_ia32_getmantps256_mask_round(A, 1, C, D, 8)
#include <wmmintrin.h>
#include <immintrin.h>
diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-rounding-3.c b/gcc/testsuite/gcc.target/i386/avx10_2-rounding-3.c
index 72a4b7f..3bed69e 100644
--- a/gcc/testsuite/gcc.target/i386/avx10_2-rounding-3.c
+++ b/gcc/testsuite/gcc.target/i386/avx10_2-rounding-3.c
@@ -105,6 +105,24 @@
/* { dg-final { scan-assembler-times "vfnmsub...ph\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vfnmsub231ph\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vfnmsub...ph\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vgetexppd\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vgetexppd\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vgetexppd\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vgetexpph\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vgetexpph\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vgetexpph\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vgetexpps\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vgetexpps\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vgetexpps\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vgetmantpd\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vgetmantpd\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vgetmantpd\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vgetmantph\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vgetmantph\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vgetmantph\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vgetmantps\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vgetmantps\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vgetmantps\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
#include <immintrin.h>
@@ -322,3 +340,44 @@ avx10_2_test_15 (void)
x = _mm256_mask3_fnmsub_round_ps (x, x, x, m8, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC);
x = _mm256_maskz_fnmsub_round_ps (m8, x, x, x, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);
}
+
+void extern
+avx10_2_test_16 (void)
+{
+ xd = _mm256_getexp_round_pd (xd, _MM_FROUND_NO_EXC);
+ xd = _mm256_mask_getexp_round_pd (xd, m8, xd, _MM_FROUND_NO_EXC);
+ xd = _mm256_maskz_getexp_round_pd (m8, xd, _MM_FROUND_NO_EXC);
+
+ xh = _mm256_getexp_round_ph (xh, _MM_FROUND_NO_EXC);
+ xh = _mm256_mask_getexp_round_ph (xh, m16, xh, _MM_FROUND_NO_EXC);
+ xh = _mm256_maskz_getexp_round_ph (m16, xh, _MM_FROUND_NO_EXC);
+
+ x = _mm256_getexp_round_ps (x, _MM_FROUND_NO_EXC);
+ x = _mm256_mask_getexp_round_ps (x, m8, x, _MM_FROUND_NO_EXC);
+ x = _mm256_maskz_getexp_round_ps (m8, x, _MM_FROUND_NO_EXC);
+}
+
+void extern
+avx10_2_test_17 (void)
+{
+ xd = _mm256_getmant_round_pd (xd, _MM_MANT_NORM_p75_1p5, _MM_MANT_SIGN_src,
+ _MM_FROUND_NO_EXC);
+ xd = _mm256_mask_getmant_round_pd (xd, m8, xd, _MM_MANT_NORM_p75_1p5,
+ _MM_MANT_SIGN_src, _MM_FROUND_NO_EXC);
+ xd = _mm256_maskz_getmant_round_pd (m8, xd, _MM_MANT_NORM_p75_1p5,
+ _MM_MANT_SIGN_src, _MM_FROUND_NO_EXC);
+
+ xh = _mm256_getmant_round_ph (xh, _MM_MANT_NORM_p75_1p5, _MM_MANT_SIGN_src,
+ _MM_FROUND_NO_EXC);
+ xh = _mm256_mask_getmant_round_ph (xh, m16, xh, _MM_MANT_NORM_p75_1p5,
+ _MM_MANT_SIGN_src, _MM_FROUND_NO_EXC);
+ xh = _mm256_maskz_getmant_round_ph (m16, xh, _MM_MANT_NORM_p75_1p5,
+ _MM_MANT_SIGN_src, _MM_FROUND_NO_EXC);
+
+ x = _mm256_getmant_round_ps (x, _MM_MANT_NORM_p75_1p5, _MM_MANT_SIGN_src,
+ _MM_FROUND_NO_EXC);
+ x = _mm256_mask_getmant_round_ps (x, m8, x, _MM_MANT_NORM_p75_1p5,
+ _MM_MANT_SIGN_src, _MM_FROUND_NO_EXC);
+ x = _mm256_maskz_getmant_round_ps (m8, x, _MM_MANT_NORM_p75_1p5,
+ _MM_MANT_SIGN_src, _MM_FROUND_NO_EXC);
+}
diff --git a/gcc/testsuite/gcc.target/i386/sse-13.c b/gcc/testsuite/gcc.target/i386/sse-13.c
index 4a44f64..04e0d59 100644
--- a/gcc/testsuite/gcc.target/i386/sse-13.c
+++ b/gcc/testsuite/gcc.target/i386/sse-13.c
@@ -976,5 +976,11 @@
#define __builtin_ia32_vfnmsubps256_mask_round(A, B, C, D, E) __builtin_ia32_vfnmsubps256_mask_round(A, B, C, D, 8)
#define __builtin_ia32_vfnmsubps256_mask3_round(A, B, C, D, E) __builtin_ia32_vfnmsubps256_mask3_round(A, B, C, D, 8)
#define __builtin_ia32_vfnmsubps256_maskz_round(A, B, C, D, E) __builtin_ia32_vfnmsubps256_maskz_round(A, B, C, D, 8)
+#define __builtin_ia32_getexppd256_mask_round(A, B, C, D) __builtin_ia32_getexppd256_mask_round(A, B, C, 8)
+#define __builtin_ia32_getexpph256_mask_round(A, B, C, D) __builtin_ia32_getexpph256_mask_round(A, B, C, 8)
+#define __builtin_ia32_getexpps256_mask_round(A, B, C, D) __builtin_ia32_getexpps256_mask_round(A, B, C, 8)
+#define __builtin_ia32_getmantpd256_mask_round(A, F, C, D, E) __builtin_ia32_getmantpd256_mask_round(A, 1, C, D, 8)
+#define __builtin_ia32_getmantph256_mask_round(A, F, C, D, E) __builtin_ia32_getmantph256_mask_round(A, 1, C, D, 8)
+#define __builtin_ia32_getmantps256_mask_round(A, F, C, D, E) __builtin_ia32_getmantps256_mask_round(A, 1, C, D, 8)
#include <x86intrin.h>
diff --git a/gcc/testsuite/gcc.target/i386/sse-14.c b/gcc/testsuite/gcc.target/i386/sse-14.c
index 5ea3342..ceb3a65 100644
--- a/gcc/testsuite/gcc.target/i386/sse-14.c
+++ b/gcc/testsuite/gcc.target/i386/sse-14.c
@@ -1066,6 +1066,12 @@ test_1 (_mm256_cvt_roundepu64_ph, __m128h, __m256i, 9)
test_1 (_mm256_cvt_roundepu64_ps, __m128, __m256i, 9)
test_1 (_mm256_cvt_roundepu16_ph, __m256h, __m256i, 8)
test_1 (_mm256_cvt_roundepi16_ph, __m256h, __m256i, 8)
+test_1 (_mm256_getexp_round_pd, __m256d, __m256d, 8)
+test_1 (_mm256_getexp_round_ph, __m256h, __m256h, 8)
+test_1 (_mm256_getexp_round_ps, __m256, __m256, 8)
+test_1y (_mm256_getmant_round_ph, __m256h, __m256h, 1, 1, 8)
+test_1y (_mm256_getmant_round_ps, __m256, __m256, 1, 1, 8)
+test_1y (_mm256_getmant_round_pd, __m256d, __m256d, 1, 1, 8)
test_2 (_mm256_add_round_pd, __m256d, __m256d, __m256d, 9)
test_2 (_mm256_add_round_ph, __m256h, __m256h, __m256h, 8)
test_2 (_mm256_add_round_ps, __m256, __m256, __m256, 9)
@@ -1120,9 +1126,15 @@ test_2 (_mm256_div_round_pd, __m256d, __m256d, __m256d, 9)
test_2 (_mm256_div_round_ph, __m256h, __m256h, __m256h, 9)
test_2 (_mm256_div_round_ps, __m256, __m256, __m256, 9)
test_2 (_mm256_fcmul_round_pch, __m256h, __m256h, __m256h, 8)
+test_2 (_mm256_maskz_getexp_round_pd, __m256d, __mmask8, __m256d, 8)
+test_2 (_mm256_maskz_getexp_round_ph, __m256h, __mmask16, __m256h, 8)
+test_2 (_mm256_maskz_getexp_round_ps, __m256, __mmask8, __m256, 8)
test_2x (_mm256_cmp_round_pd_mask, __mmask8, __m256d, __m256d, 1, 8)
test_2x (_mm256_cmp_round_ph_mask, __mmask16, __m256h, __m256h, 1, 8)
test_2x (_mm256_cmp_round_ps_mask, __mmask8, __m256, __m256, 1, 8)
+test_2y (_mm256_maskz_getmant_round_pd, __m256d, __mmask8, __m256d, 1, 1, 8)
+test_2y (_mm256_maskz_getmant_round_ph, __m256h, __mmask16, __m256h, 1, 1, 8)
+test_2y (_mm256_maskz_getmant_round_ps, __m256, __mmask8, __m256, 1, 1, 8)
test_3 (_mm256_maskz_add_round_pd, __m256d, __mmask8, __m256d, __m256d, 9)
test_3 (_mm256_maskz_add_round_ph, __m256h, __mmask16, __m256h, __m256h, 8)
test_3 (_mm256_maskz_add_round_ps, __m256, __mmask8, __m256, __m256, 9)
@@ -1198,11 +1210,17 @@ test_3 (_mm256_fnmadd_round_ps, __m256, __m256, __m256, __m256, 9)
test_3 (_mm256_fnmsub_round_pd, __m256d, __m256d, __m256d, __m256d, 9)
test_3 (_mm256_fnmsub_round_ph, __m256h, __m256h, __m256h, __m256h, 9)
test_3 (_mm256_fnmsub_round_ps, __m256, __m256, __m256, __m256, 9)
+test_3 (_mm256_mask_getexp_round_pd, __m256d, __m256d, __mmask8, __m256d, 8)
+test_3 (_mm256_mask_getexp_round_ph, __m256h, __m256h, __mmask16, __m256h, 8)
+test_3 (_mm256_mask_getexp_round_ps, __m256, __m256, __mmask8, __m256, 8)
test_3x (_mm256_mask_cmp_round_pd_mask, __mmask8, __mmask8, __m256d, __m256d, 1, 8)
test_3x (_mm256_mask_cmp_round_ph_mask, __mmask16, __mmask16, __m256h, __m256h, 1, 8)
test_3x (_mm256_mask_cmp_round_ps_mask, __mmask8, __mmask8, __m256, __m256, 1, 8)
test_3x (_mm256_fixupimm_round_pd, __m256d, __m256d, __m256d, __m256i, 3, 8)
test_3x (_mm256_fixupimm_round_ps, __m256, __m256, __m256, __m256i, 3, 8)
+test_3y (_mm256_mask_getmant_round_pd, __m256d, __m256d, __mmask8, __m256d, 1, 1, 8)
+test_3y (_mm256_mask_getmant_round_ph, __m256h, __m256h, __mmask16, __m256h, 1, 1, 8)
+test_3y (_mm256_mask_getmant_round_ps, __m256, __m256, __mmask8, __m256, 1, 1, 8)
test_4 (_mm256_mask_add_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256d, 9)
test_4 (_mm256_mask_add_round_ph, __m256h, __m256h, __mmask16, __m256h, __m256h, 8)
test_4 (_mm256_mask_add_round_ps, __m256, __m256, __mmask8, __m256, __m256, 9)
diff --git a/gcc/testsuite/gcc.target/i386/sse-22.c b/gcc/testsuite/gcc.target/i386/sse-22.c
index 44aa93d..6457e75 100644
--- a/gcc/testsuite/gcc.target/i386/sse-22.c
+++ b/gcc/testsuite/gcc.target/i386/sse-22.c
@@ -1109,6 +1109,12 @@ test_1 (_mm256_cvt_roundepu64_ph, __m128h, __m256i, 9)
test_1 (_mm256_cvt_roundepu64_ps, __m128, __m256i, 9)
test_1 (_mm256_cvt_roundepu16_ph, __m256h, __m256i, 8)
test_1 (_mm256_cvt_roundepi16_ph, __m256h, __m256i, 8)
+test_1 (_mm256_getexp_round_pd, __m256d, __m256d, 8)
+test_1 (_mm256_getexp_round_ph, __m256h, __m256h, 8)
+test_1 (_mm256_getexp_round_ps, __m256, __m256, 8)
+test_1y (_mm256_getmant_round_ph, __m256h, __m256h, 1, 1, 8)
+test_1y (_mm256_getmant_round_ps, __m256, __m256, 1, 1, 8)
+test_1y (_mm256_getmant_round_pd, __m256d, __m256d, 1, 1, 8)
test_2 (_mm256_add_round_pd, __m256d, __m256d, __m256d, 9)
test_2 (_mm256_add_round_ph, __m256h, __m256h, __m256h, 8)
test_2 (_mm256_add_round_ps, __m256, __m256, __m256, 9)
@@ -1163,9 +1169,15 @@ test_2 (_mm256_div_round_pd, __m256d, __m256d, __m256d, 9)
test_2 (_mm256_div_round_ph, __m256h, __m256h, __m256h, 9)
test_2 (_mm256_div_round_ps, __m256, __m256, __m256, 9)
test_2 (_mm256_fcmul_round_pch, __m256h, __m256h, __m256h, 8)
+test_2 (_mm256_maskz_getexp_round_pd, __m256d, __mmask8, __m256d, 8)
+test_2 (_mm256_maskz_getexp_round_ph, __m256h, __mmask16, __m256h, 8)
+test_2 (_mm256_maskz_getexp_round_ps, __m256, __mmask8, __m256, 8)
test_2x (_mm256_cmp_round_pd_mask, __mmask8, __m256d, __m256d, 1, 8)
test_2x (_mm256_cmp_round_ph_mask, __mmask16, __m256h, __m256h, 1, 8)
test_2x (_mm256_cmp_round_ps_mask, __mmask8, __m256, __m256, 1, 8)
+test_2y (_mm256_maskz_getmant_round_pd, __m256d, __mmask8, __m256d, 1, 1, 8)
+test_2y (_mm256_maskz_getmant_round_ph, __m256h, __mmask16, __m256h, 1, 1, 8)
+test_2y (_mm256_maskz_getmant_round_ps, __m256, __mmask8, __m256, 1, 1, 8)
test_3 (_mm256_maskz_add_round_pd, __m256d, __mmask8, __m256d, __m256d, 9)
test_3 (_mm256_maskz_add_round_ph, __m256h, __mmask16, __m256h, __m256h, 8)
test_3 (_mm256_maskz_add_round_ps, __m256, __mmask8, __m256, __m256, 9)
@@ -1240,11 +1252,17 @@ test_3 (_mm256_fnmadd_round_ps, __m256, __m256, __m256, __m256, 9)
test_3 (_mm256_fnmsub_round_pd, __m256d, __m256d, __m256d, __m256d, 9)
test_3 (_mm256_fnmsub_round_ph, __m256h, __m256h, __m256h, __m256h, 9)
test_3 (_mm256_fnmsub_round_ps, __m256, __m256, __m256, __m256, 9)
+test_3 (_mm256_mask_getexp_round_pd, __m256d, __m256d, __mmask8, __m256d, 8)
+test_3 (_mm256_mask_getexp_round_ph, __m256h, __m256h, __mmask16, __m256h, 8)
+test_3 (_mm256_mask_getexp_round_ps, __m256, __m256, __mmask8, __m256, 8)
test_3x (_mm256_mask_cmp_round_pd_mask, __mmask8, __mmask8, __m256d, __m256d, 1, 8)
test_3x (_mm256_mask_cmp_round_ph_mask, __mmask16, __mmask16, __m256h, __m256h, 1, 8)
test_3x (_mm256_mask_cmp_round_ps_mask, __mmask8, __mmask8, __m256, __m256, 1, 8)
test_3x (_mm256_fixupimm_round_pd, __m256d, __m256d, __m256d, __m256i, 3, 8)
test_3x (_mm256_fixupimm_round_ps, __m256, __m256, __m256, __m256i, 3, 8)
+test_3y (_mm256_mask_getmant_round_pd, __m256d, __m256d, __mmask8, __m256d, 1, 1, 8)
+test_3y (_mm256_mask_getmant_round_ph, __m256h, __m256h, __mmask16, __m256h, 1, 1, 8)
+test_3y (_mm256_mask_getmant_round_ps, __m256, __m256, __mmask8, __m256, 1, 1, 8)
test_4 (_mm256_mask_add_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256d, 9)
test_4 (_mm256_mask_add_round_ph, __m256h, __m256h, __mmask16, __m256h, __m256h, 8)
test_4 (_mm256_mask_add_round_ps, __m256, __m256, __mmask8, __m256, __m256, 9)
diff --git a/gcc/testsuite/gcc.target/i386/sse-23.c b/gcc/testsuite/gcc.target/i386/sse-23.c
index ecd8c50..95f55b2 100644
--- a/gcc/testsuite/gcc.target/i386/sse-23.c
+++ b/gcc/testsuite/gcc.target/i386/sse-23.c
@@ -951,6 +951,12 @@
#define __builtin_ia32_vfnmsubps256_mask_round(A, B, C, D, E) __builtin_ia32_vfnmsubps256_mask_round(A, B, C, D, 8)
#define __builtin_ia32_vfnmsubps256_mask3_round(A, B, C, D, E) __builtin_ia32_vfnmsubps256_mask3_round(A, B, C, D, 8)
#define __builtin_ia32_vfnmsubps256_maskz_round(A, B, C, D, E) __builtin_ia32_vfnmsubps256_maskz_round(A, B, C, D, 8)
+#define __builtin_ia32_getexppd256_mask_round(A, B, C, D) __builtin_ia32_getexppd256_mask_round(A, B, C, 8)
+#define __builtin_ia32_getexpph256_mask_round(A, B, C, D) __builtin_ia32_getexpph256_mask_round(A, B, C, 8)
+#define __builtin_ia32_getexpps256_mask_round(A, B, C, D) __builtin_ia32_getexpps256_mask_round(A, B, C, 8)
+#define __builtin_ia32_getmantpd256_mask_round(A, F, C, D, E) __builtin_ia32_getmantpd256_mask_round(A, 1, C, D, 8)
+#define __builtin_ia32_getmantph256_mask_round(A, F, C, D, E) __builtin_ia32_getmantph256_mask_round(A, 1, C, D, 8)
+#define __builtin_ia32_getmantps256_mask_round(A, F, C, D, E) __builtin_ia32_getmantps256_mask_round(A, 1, C, D, 8)
#pragma GCC target ("sse4a,3dnow,avx,avx2,fma4,xop,aes,pclmul,popcnt,abm,lzcnt,bmi,bmi2,tbm,lwp,fsgsbase,rdrnd,f16c,fma,rtm,rdseed,prfchw,adx,fxsr,xsaveopt,sha,xsavec,xsaves,clflushopt,clwb,mwaitx,clzero,pku,sgx,rdpid,gfni,vpclmulqdq,pconfig,wbnoinvd,enqcmd,avx512vp2intersect,serialize,tsxldtrk,amx-tile,amx-int8,amx-bf16,kl,widekl,avxvnni,avxifma,avxvnniint8,avxneconvert,cmpccxadd,amx-fp16,prefetchi,raoint,amx-complex,avxvnniint16,sm3,sha512,sm4,avx10.2-512")