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| author | Jakub Jelinek <jakub@redhat.com> | 2019-08-28 12:12:11 +0200 |
|---|---|---|
| committer | Jakub Jelinek <jakub@gcc.gnu.org> | 2019-08-28 12:12:11 +0200 |
| commit | 5cb72d83bb375ea6ad2121daf4202605e7883d30 (patch) | |
| tree | 1f2da6e1fade339a0594d648de09357ceeb447c1 /gcc | |
| parent | 95ecbf4695a775853e4135d7dfda0be90ae8e80d (diff) | |
| download | gcc-5cb72d83bb375ea6ad2121daf4202605e7883d30.zip gcc-5cb72d83bb375ea6ad2121daf4202605e7883d30.tar.gz gcc-5cb72d83bb375ea6ad2121daf4202605e7883d30.tar.bz2 | |
re PR libgomp/91530 (Several libgomp.*/scan-* tests FAIL without avx_runtime)
PR libgomp/91530
* config/i386/sse.md (vec_shl_<mode>, vec_shr_<mode>): Use
V_128 iterator instead of VI_128.
* testsuite/libgomp.c/scan-21.c: New test.
* testsuite/libgomp.c/scan-22.c: New test.
From-SVN: r274984
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/config/i386/sse.md | 8 |
2 files changed, 10 insertions, 4 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 1948829..1ee26fc 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2019-08-28 Jakub Jelinek <jakub@redhat.com> + + PR libgomp/91530 + * config/i386/sse.md (vec_shl_<mode>, vec_shr_<mode>): Use + V_128 iterator instead of VI_128. + 2019-08-28 Martin Liska <mliska@suse.cz> PR tree-optimization/90970 diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 7bef939..621b4db 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -12047,9 +12047,9 @@ (define_expand "vec_shl_<mode>" [(set (match_dup 3) (ashift:V1TI - (match_operand:VI_128 1 "register_operand") + (match_operand:V_128 1 "register_operand") (match_operand:SI 2 "const_0_to_255_mul_8_operand"))) - (set (match_operand:VI_128 0 "register_operand") (match_dup 4))] + (set (match_operand:V_128 0 "register_operand") (match_dup 4))] "TARGET_SSE2" { operands[1] = gen_lowpart (V1TImode, operands[1]); @@ -12060,9 +12060,9 @@ (define_expand "vec_shr_<mode>" [(set (match_dup 3) (lshiftrt:V1TI - (match_operand:VI_128 1 "register_operand") + (match_operand:V_128 1 "register_operand") (match_operand:SI 2 "const_0_to_255_mul_8_operand"))) - (set (match_operand:VI_128 0 "register_operand") (match_dup 4))] + (set (match_operand:V_128 0 "register_operand") (match_dup 4))] "TARGET_SSE2" { operands[1] = gen_lowpart (V1TImode, operands[1]); |