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author | Kyrylo Tkachov <ktkachov@nvidia.com> | 2024-08-05 10:47:33 -0700 |
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committer | Kyrylo Tkachov <ktkachov@nvidia.com> | 2024-08-09 08:26:32 +0200 |
commit | 19e565ed13972410451091a789fe58638d03b795 (patch) | |
tree | 706c672ceff52eed3d8cce26c24f744c21fc397f /gcc | |
parent | 77ccfa6ac8d6e4dfefdea45c4259a2873ff9eb3d (diff) | |
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aarch64: Check CONSTM1_RTX in definition of Dm constraint
The constraint Dm is intended to match vectors of minus 1, but actually
checks for CONST1_RTX. This doesn't have a bad effect in practice as its
only use in the aarch64_wrffr pattern for the setffr instruction which
is a VNx16BI operation and -1 and 1 are the same there. That pattern
can only be currently generated through intrinsics anyway that create it
with a CONSTM1_RTX constant.
Fix the constraint definition so that it doesn't become a footgun if its
used in some other pattern.
Bootstrapped and tested on aarch64-none-linux-gnu.
Signed-off-by: Kyrylo Tkachov <ktkachov@nvidia.com>
gcc/ChangeLog:
* config/aarch64/constraints.md (Dm): Match CONSTM1_RTX rather
CONST1_RTX.
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/config/aarch64/constraints.md | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/gcc/config/aarch64/constraints.md b/gcc/config/aarch64/constraints.md index 0c81fb2..a2878f5 100644 --- a/gcc/config/aarch64/constraints.md +++ b/gcc/config/aarch64/constraints.md @@ -556,7 +556,7 @@ "@internal A constraint that matches a vector of immediate minus one." (and (match_code "const,const_vector") - (match_test "op == CONST1_RTX (GET_MODE (op))"))) + (match_test "op == CONSTM1_RTX (GET_MODE (op))"))) (define_constraint "Dd" "@internal |