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| author | Oleg Endo <olegendo@gcc.gnu.org> | 2014-10-16 12:21:29 +0000 |
|---|---|---|
| committer | Oleg Endo <olegendo@gcc.gnu.org> | 2014-10-16 12:21:29 +0000 |
| commit | b7359edc20cae432bb68f5f897ba485f34de6f9a (patch) | |
| tree | 3f5a0d00cca9c6b7ceb9f5c24fc98618b9c718c5 /gcc | |
| parent | 6c0975accd61fa7255fff43ed8fc7bd921f9b9ae (diff) | |
| download | gcc-b7359edc20cae432bb68f5f897ba485f34de6f9a.zip gcc-b7359edc20cae432bb68f5f897ba485f34de6f9a.tar.gz gcc-b7359edc20cae432bb68f5f897ba485f34de6f9a.tar.bz2 | |
re PR target/59401 ([SH] GBR addressing mode optimization produces wrong code)
gcc/
PR target/59401
* config/sh/sh.h (CALL_REALLY_USED_REGISTERS): Expand macro and set
GBR to 0.
From-SVN: r216314
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/config/sh/sh.h | 39 |
2 files changed, 42 insertions, 3 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index dbe0ecb..9425667 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2014-10-16 Oleg Endo <olegendo@gcc.gnu.org> + + PR target/59401 + * config/sh/sh.h (CALL_REALLY_USED_REGISTERS): Expand macro and set + GBR to 0. + 2014-10-16 Alexander Ivchenko <alexander.ivchenko@intel.com> Maxim Kuznetsov <maxim.kuznetsov@intel.com> Anna Tikhonova <anna.tikhonova@intel.com> diff --git a/gcc/config/sh/sh.h b/gcc/config/sh/sh.h index c6e16bd..5b8b4a1 100644 --- a/gcc/config/sh/sh.h +++ b/gcc/config/sh/sh.h @@ -821,9 +821,42 @@ extern char sh_additional_register_names[ADDREGNAMES_SIZE] \ 1, 1, 1, 1, \ } -/* TARGET_CONDITIONAL_REGISTER_USAGE might want to make a register - call-used, yet fixed, like PIC_OFFSET_TABLE_REGNUM. */ -#define CALL_REALLY_USED_REGISTERS CALL_USED_REGISTERS +/* CALL_REALLY_USED_REGISTERS is used as a default setting, which is then + overridden by -fcall-saved-* and -fcall-used-* options and then by + TARGET_CONDITIONAL_REGISTER_USAGE. There we might want to make a + register call-used, yet fixed, like PIC_OFFSET_TABLE_REGNUM. */ +#define CALL_REALLY_USED_REGISTERS \ +{ \ +/* Regular registers. */ \ + 1, 1, 1, 1, 1, 1, 1, 1, \ + /* R8 and R9 are call-clobbered on SH5, but not on earlier SH ABIs. \ + Only the lower 32bits of R10-R14 are guaranteed to be preserved \ + across SH5 function calls. */ \ + 0, 0, 0, 0, 0, 0, 0, 1, \ + 1, 1, 1, 1, 1, 1, 1, 1, \ + 1, 1, 1, 1, 0, 0, 0, 0, \ + 0, 0, 0, 0, 1, 1, 1, 1, \ + 1, 1, 1, 1, 0, 0, 0, 0, \ + 0, 0, 0, 0, 0, 0, 0, 0, \ + 0, 0, 0, 0, 1, 1, 1, 1, \ +/* FP registers. */ \ + 1, 1, 1, 1, 1, 1, 1, 1, \ + 1, 1, 1, 1, 0, 0, 0, 0, \ + 1, 1, 1, 1, 1, 1, 1, 1, \ + 1, 1, 1, 1, 1, 1, 1, 1, \ + 1, 1, 1, 1, 0, 0, 0, 0, \ + 0, 0, 0, 0, 0, 0, 0, 0, \ + 0, 0, 0, 0, 0, 0, 0, 0, \ + 0, 0, 0, 0, 0, 0, 0, 0, \ +/* Branch target registers. */ \ + 1, 1, 1, 1, 1, 0, 0, 0, \ +/* XD registers. */ \ + 1, 1, 1, 1, 1, 1, 0, 0, \ +/*"gbr", "ap", "pr", "t", "mach", "macl", "fpul", "fpscr", */ \ + 0, 1, 1, 1, 1, 1, 1, 1, \ +/*"rap", "sfp","fpscr0","fpscr1" */ \ + 1, 1, 0, 0, \ +} /* Only the lower 32-bits of R10-R14 are guaranteed to be preserved across SHcompact function calls. We can't tell whether a called |