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| author | Richard Kenner <kenner@gcc.gnu.org> | 1995-05-30 08:17:18 -0400 |
|---|---|---|
| committer | Richard Kenner <kenner@gcc.gnu.org> | 1995-05-30 08:17:18 -0400 |
| commit | b41059b4e32bd038b95b87ed8e4c3991dcd219d0 (patch) | |
| tree | 38dd26f8b2d12f479d68cce5cd9ab3dc40ff2465 /gcc | |
| parent | 28ee27fd5532e418605d1f9c5870850052a56be8 (diff) | |
| download | gcc-b41059b4e32bd038b95b87ed8e4c3991dcd219d0.zip gcc-b41059b4e32bd038b95b87ed8e4c3991dcd219d0.tar.gz gcc-b41059b4e32bd038b95b87ed8e4c3991dcd219d0.tar.bz2 | |
(tstdi): Use tst/subx #0 instead of neg/negx.
Allow "a" and ">" for operand 0.
From-SVN: r9841
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/config/m68k/m68k.md | 23 |
1 files changed, 18 insertions, 5 deletions
diff --git a/gcc/config/m68k/m68k.md b/gcc/config/m68k/m68k.md index 672278a..032b25e 100644 --- a/gcc/config/m68k/m68k.md +++ b/gcc/config/m68k/m68k.md @@ -283,16 +283,29 @@ (define_insn "tstdi" [(set (cc0) - (match_operand:DI 0 "nonimmediate_operand" "do"))] + (match_operand:DI 0 "nonimmediate_operand" "oa>,d")) + (clobber (match_scratch:SI 1 "=d,d")) + (clobber (match_scratch:SI 2 "=d,"))] "" "* { if (GET_CODE (operands[0]) == REG) - operands[1] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + operands[3] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + else if (GET_CODE (operands[0]) == MEM + && GET_CODE (XEXP (operands[0], 0)) == POST_INC) + operands[3] = operands[0]; else - operands[1] = adj_offsettable_operand (operands[0], 4); - /* Just in case we come here. I hope all tst:DI are combined !!! */ - return \"neg%.l %1\;negx%.l %0\;neg%.l %1\;negx%.l %0\"; + operands[3] = adj_offsettable_operand (operands[0], 4); + if (DATA_REG_P (operands[0])) + operands[2] = operands[0]; + else + output_asm_insn (\"move%.l %0,%2\", operands); + /* + ** 'sub' clears %1, and also clears the X cc bit + ** 'tst' sets the Z cc bit according to the low part of the DImode operand + ** 'subx %1' (i.e. subx #0) acts as a (non-existent) tstx on the high part + */ + return \"sub%.l %1,%1\;tst%.l %3\;subx%.l %1,%2\"; }") (define_insn "tstsi" |