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| author | Gerald Pfeifer <gerald@pfeifer.com> | 2017-02-05 11:09:18 +0000 |
|---|---|---|
| committer | Gerald Pfeifer <gerald@gcc.gnu.org> | 2017-02-05 11:09:18 +0000 |
| commit | b11f6c195cebccaaf973480512fb38281cb2a613 (patch) | |
| tree | fda613f6ae2e626cb7f664f842b0579c0530e6fc /gcc | |
| parent | f3877b2f7077963f9c688a4116e6d8abd0d212a6 (diff) | |
| download | gcc-b11f6c195cebccaaf973480512fb38281cb2a613.zip gcc-b11f6c195cebccaaf973480512fb38281cb2a613.tar.gz gcc-b11f6c195cebccaaf973480512fb38281cb2a613.tar.bz2 | |
extend.texi (x86 specific memory model extensions for transactional memory): Simplify a phrase.
* doc/extend.texi (x86 specific memory model extensions for
transactional memory): Simplify a phrase.
From-SVN: r245189
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/doc/extend.texi | 2 |
2 files changed, 6 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 9e75138..e0d251d 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2017-02-05 Gerald Pfeifer <gerald@pfeifer.com> + + * doc/extend.texi (x86 specific memory model extensions for + transactional memory): Simplify a phrase. + 2017-02-05 Eric Botcazou <ebotcazou@adacore.com> PR target/79353 diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi index 20eba82..24e5053 100644 --- a/gcc/doc/extend.texi +++ b/gcc/doc/extend.texi @@ -10103,7 +10103,7 @@ after addition, conditional jump on carry etc. @section x86-Specific Memory Model Extensions for Transactional Memory The x86 architecture supports additional memory ordering flags -to mark lock critical sections for hardware lock elision. +to mark critical sections for hardware lock elision. These must be specified in addition to an existing memory order to atomic intrinsics. |