diff options
author | David Edelsohn <edelsohn@gnu.org> | 1996-02-28 00:20:40 +0000 |
---|---|---|
committer | David Edelsohn <edelsohn@gnu.org> | 1996-02-28 00:20:40 +0000 |
commit | a66078ee0069ee44bf13f8b169080e4ded51e56a (patch) | |
tree | 7c63e79e88a8545d9239516721a7d9eaaa9b8a49 /gcc | |
parent | 64305719ea0df5314788e0abbd987fdfa26f2ca3 (diff) | |
download | gcc-a66078ee0069ee44bf13f8b169080e4ded51e56a.zip gcc-a66078ee0069ee44bf13f8b169080e4ded51e56a.tar.gz gcc-a66078ee0069ee44bf13f8b169080e4ded51e56a.tar.bz2 |
Use new 'H' for DImode shifts and use 'h' consistently for SImode
From-SVN: r11358
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/config/rs6000/rs6000.md | 39 |
1 files changed, 19 insertions, 20 deletions
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 6a22c99..db265fe 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -2068,7 +2068,7 @@ operands[4] = gen_rtx (CONST_INT, VOIDmode, 32 - start - size); operands[1] = gen_rtx (CONST_INT, VOIDmode, start + size - 1); - return \"{rlimi|rlwimi} %0,%3,%4,%h2,%h1\"; + return \"{rlimi|rlwimi} %0,%3,%h4,%h2,%h1\"; }") (define_insn "" @@ -2084,9 +2084,9 @@ int start = INTVAL (operands[2]) & 31; int size = INTVAL (operands[1]) & 31; - operands[4] = gen_rtx (CONST_INT, VOIDmode, (shift - start - size) & 31); + operands[4] = gen_rtx (CONST_INT, VOIDmode, shift - start - size); operands[1] = gen_rtx (CONST_INT, VOIDmode, start + size - 1); - return \"{rlimi|rlwimi} %0,%3,%4,%h2,%h1\"; + return \"{rlimi|rlwimi} %0,%3,%h4,%h2,%h1\"; }") (define_insn "" @@ -2102,9 +2102,9 @@ int start = INTVAL (operands[2]) & 31; int size = INTVAL (operands[1]) & 31; - operands[4] = gen_rtx (CONST_INT, VOIDmode, (32 - shift - start - size) & 31); + operands[4] = gen_rtx (CONST_INT, VOIDmode, 32 - shift - start - size); operands[1] = gen_rtx (CONST_INT, VOIDmode, start + size - 1); - return \"{rlimi|rlwimi} %0,%3,%4,%h2,%h1\"; + return \"{rlimi|rlwimi} %0,%3,%h4,%h2,%h1\"; }") (define_insn "" @@ -2120,9 +2120,9 @@ int start = INTVAL (operands[2]) & 31; int size = INTVAL (operands[1]) & 31; - operands[4] = gen_rtx (CONST_INT, VOIDmode, (32 - shift - start - size) & 31); + operands[4] = gen_rtx (CONST_INT, VOIDmode, 32 - shift - start - size); operands[1] = gen_rtx (CONST_INT, VOIDmode, start + size - 1); - return \"{rlimi|rlwimi} %0,%3,%4,%h2,%h1\"; + return \"{rlimi|rlwimi} %0,%3,%h4,%h2,%h1\"; }") (define_insn "" @@ -2142,9 +2142,9 @@ /* Align extract field with insert field */ operands[5] = gen_rtx (CONST_INT, VOIDmode, - (extract_start + extract_size - insert_start - insert_size) & 31); + extract_start + extract_size - insert_start - insert_size); operands[1] = gen_rtx (CONST_INT, VOIDmode, insert_start + insert_size - 1); - return \"{rlimi|rlwimi} %0,%3,%5,%h2,%h1\"; + return \"{rlimi|rlwimi} %0,%3,%h5,%h2,%h1\"; }") (define_insn "" @@ -2159,8 +2159,7 @@ int size = INTVAL (operands[1]) & 63; operands[2] = gen_rtx (CONST_INT, VOIDmode, 64 - start - size); - operands[1] = gen_rtx (CONST_INT, VOIDmode, start); - return \"rldimi %0,%3,%2,%1\"; + return \"rldimi %0,%3,%H2,%H1\"; }") (define_expand "extzv" @@ -4296,7 +4295,7 @@ (rotate:DI (match_operand:DI 1 "gpc_reg_operand" "r") (match_operand:DI 2 "reg_or_cint_operand" "ri")))] "TARGET_POWERPC64" - "rld%I2cl %0,%1,%h2,0") + "rld%I2cl %0,%1,%H2,0") (define_insn "" [(set (match_operand:CC 0 "cc_reg_operand" "=x") @@ -4305,7 +4304,7 @@ (const_int 0))) (clobber (match_scratch:DI 3 "=r"))] "TARGET_POWERPC64" - "rld%I2cl. %3,%1,%h2,0" + "rld%I2cl. %3,%1,%H2,0" [(set_attr "type" "delayed_compare")]) (define_insn "" @@ -4316,7 +4315,7 @@ (set (match_operand:DI 0 "gpc_reg_operand" "=r") (rotate:DI (match_dup 1) (match_dup 2)))] "TARGET_POWERPC64" - "rld%I2cl. %0,%1,%h2,0" + "rld%I2cl. %0,%1,%H2,0" [(set_attr "type" "delayed_compare")]) (define_expand "ashldi3" @@ -4342,7 +4341,7 @@ (ashift:DI (match_operand:DI 1 "gpc_reg_operand" "r") (match_operand:SI 2 "reg_or_cint_operand" "ri")))] "TARGET_POWERPC64" - "sld%I2 %0,%1,%2" + "sld%I2 %0,%1,%H2" [(set_attr "length" "8")]) (define_insn "" @@ -4352,7 +4351,7 @@ (const_int 0))) (clobber (match_scratch:DI 3 "=r"))] "TARGET_POWERPC64" - "sld%I2. %3,%1,%2" + "sld%I2. %3,%1,%H2" [(set_attr "type" "delayed_compare")]) (define_insn "" @@ -4363,7 +4362,7 @@ (set (match_operand:DI 0 "gpc_reg_operand" "=r") (ashift:DI (match_dup 1) (match_dup 2)))] "TARGET_POWERPC64" - "sld%I2. %0,%1,%2" + "sld%I2. %0,%1,%H2" [(set_attr "type" "delayed_compare")]) (define_expand "lshrdi3" @@ -4389,7 +4388,7 @@ (lshiftrt:DI (match_operand:DI 1 "gpc_reg_operand" "r") (match_operand:SI 2 "reg_or_cint_operand" "ri")))] "TARGET_POWERPC64" - "srd%I2 %0,%1,%2") + "srd%I2 %0,%1,%H2") (define_insn "" [(set (match_operand:CC 0 "cc_reg_operand" "=x") @@ -4398,7 +4397,7 @@ (const_int 0))) (clobber (match_scratch:DI 3 "=r"))] "TARGET_POWERPC64" - "srd%I2. %3,%1,%2" + "srd%I2. %3,%1,%H2" [(set_attr "type" "delayed_compare")]) (define_insn "" @@ -4409,7 +4408,7 @@ (set (match_operand:DI 0 "gpc_reg_operand" "=r") (lshiftrt:DI (match_dup 1) (match_dup 2)))] "TARGET_POWERPC64" - "srd%I2. %0,%1,%2" + "srd%I2. %0,%1,%H2" [(set_attr "type" "delayed_compare")]) (define_expand "ashrdi3" |