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| author | Andreas Schwab <schwab@issan.informatik.uni-dortmund.de> | 1998-04-15 01:49:23 +0000 |
|---|---|---|
| committer | Andreas Schwab <schwab@gcc.gnu.org> | 1998-04-15 01:49:23 +0000 |
| commit | 7878eae79957316b025f9647dd5fb66d3b9b3f91 (patch) | |
| tree | 652f6ca5b551bea72ee90f7b95ed8188cc23d134 /gcc | |
| parent | b15fd0927e98e8c679e27ac6b822f8a0817f2abc (diff) | |
| download | gcc-7878eae79957316b025f9647dd5fb66d3b9b3f91.zip gcc-7878eae79957316b025f9647dd5fb66d3b9b3f91.tar.gz gcc-7878eae79957316b025f9647dd5fb66d3b9b3f91.tar.bz2 | |
m68k.md (adddi3, subdi3): Optimize for constant operand.
* config/m68k/m68k.md (adddi3, subdi3): Optimize for constant
operand.
From-SVN: r19220
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/config/m68k/m68k.md | 54 |
2 files changed, 55 insertions, 4 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index ee3738a..6c1a2fe 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +Wed Apr 15 10:47:21 1998 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de> + + * config/m68k/m68k.md (adddi3, subdi3): Optimize for constant + operand. + Wed Apr 15 01:21:21 1998 Jeffrey A Law (law@cygnus.com) * emit-rtl.c (operand_subword): Rework slightly to avoid diff --git a/gcc/config/m68k/m68k.md b/gcc/config/m68k/m68k.md index 881b288..b1501de 100644 --- a/gcc/config/m68k/m68k.md +++ b/gcc/config/m68k/m68k.md @@ -2150,6 +2150,7 @@ } else { + rtx xoperands[2]; if (GET_CODE (operands[2]) == REG) operands[1] = gen_rtx_REG (SImode, REGNO (operands[2]) + 1); else if (GET_CODE (operands[2]) == CONST_DOUBLE) @@ -2164,8 +2165,30 @@ } else operands[1] = adj_offsettable_operand (operands[2], 4); - /* TODO : for consts, optimize move and add */ - return \"move%.l %2,%3\;add%.l %1,%R0\;addx%.l %3,%0\"; + xoperands[0] = operands[3]; + xoperands[1] = operands[2]; + output_asm_insn (output_move_simode (xoperands), xoperands); + if (GET_CODE (operands[1]) == CONST_INT) + { + if (INTVAL (operands[1]) > 0 && INTVAL (operands[1]) <= 8) + { +#ifdef NO_ADDSUB_Q + return \"add%.l %1,%R0\;addx%.l %3,%0\"; +#else + return \"addq%.l %1,%R0\;addx%.l %3,%0\"; +#endif + } + else if (INTVAL (operands[1]) >= -8 && INTVAL (operands[1]) < 0) + { + operands[1] = GEN_INT (-INTVAL (operands[1])); +#ifdef NO_ADDSUB_Q + return \"sub%.l %1,%R0\;addx%.l %3,%0\"; +#else + return \"subq%.l %1,%R0\;addx%.l %3,%0\"; +#endif + } + } + return \"add%.l %1,%R0\;addx%.l %3,%0\"; } } else if (GET_CODE (operands[0]) == MEM) @@ -2680,6 +2703,7 @@ } else { + rtx xoperands[2]; if (GET_CODE (operands[2]) == REG) operands[1] = gen_rtx_REG (SImode, REGNO (operands[2]) + 1); else if (GET_CODE (operands[2]) == CONST_DOUBLE) @@ -2694,8 +2718,30 @@ } else operands[1] = adj_offsettable_operand (operands[2], 4); - /* TODO : for consts, optimize move and sub */ - return \"move%.l %2,%3\;sub%.l %1,%R0\;subx%.l %3,%0\"; + xoperands[0] = operands[3]; + xoperands[1] = operands[2]; + output_asm_insn (output_move_simode (xoperands), xoperands); + if (GET_CODE (operands[1]) == CONST_INT) + { + if (INTVAL (operands[1]) > 0 && INTVAL (operands[1]) <= 8) + { +#ifdef NO_ADDSUB_Q + return \"sub%.l %1,%R0\;subx%.l %3,%0\"; +#else + return \"subq%.l %1,%R0\;subx%.l %3,%0\"; +#endif + } + else if (INTVAL (operands[1]) >= -8 && INTVAL (operands[1]) < 0) + { + operands[1] = GEN_INT (-INTVAL (operands[1])); +#ifdef NO_ADDSUB_Q + return \"add%.l %1,%R0\;subx%.l %3,%0\"; +#else + return \"addq%.l %1,%R0\;subx%.l %3,%0\"; +#endif + } + } + return \"sub%.l %1,%R0\;subx%.l %3,%0\"; } } else if (GET_CODE (operands[0]) == MEM) |