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| author | Torbjorn Granlund <tege@gnu.org> | 1994-06-15 02:32:05 +0000 |
|---|---|---|
| committer | Torbjorn Granlund <tege@gnu.org> | 1994-06-15 02:32:05 +0000 |
| commit | 6f7f03f812912116cbdbf302f81ac95e16ad6615 (patch) | |
| tree | 4b06a15e5eb6eb2e0f072b1577fc54de14c86091 /gcc | |
| parent | fe006562ba9dac8f0d5aefd4f05fd592efd22534 (diff) | |
| download | gcc-6f7f03f812912116cbdbf302f81ac95e16ad6615.zip gcc-6f7f03f812912116cbdbf302f81ac95e16ad6615.tar.gz gcc-6f7f03f812912116cbdbf302f81ac95e16ad6615.tar.bz2 | |
(cmplsrcb_operand): New predicate.
From-SVN: r7477
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/config/a29k/a29k.c | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/gcc/config/a29k/a29k.c b/gcc/config/a29k/a29k.c index 08363ed..4c97841 100644 --- a/gcc/config/a29k/a29k.c +++ b/gcc/config/a29k/a29k.c @@ -282,6 +282,22 @@ srcb_operand (op, mode) return gpc_reg_operand (op, mode); } +int +cmplsrcb_operand (op, mode) + register rtx op; + enum machine_mode mode; +{ + if (GET_CODE (op) == CONST_INT + && (mode == QImode + || (INTVAL (op) & 0xffffff00) == 0xffffff00)) + return 1; + + if (GET_MODE (op) != mode && mode != VOIDmode) + return 0; + + return gpc_reg_operand (op, mode); +} + /* Return 1 if OP is either an immediate or a general register. This is used for the input operand of mtsr/mtrsim. */ |