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| author | Jonathan Wright <jonathan.wright@arm.com> | 2021-11-09 18:01:46 +0000 |
|---|---|---|
| committer | Jonathan Wright <jonathan.wright@arm.com> | 2021-11-11 15:34:51 +0000 |
| commit | 6eca10aa761c56b9a26763e036c72475337194f8 (patch) | |
| tree | df6dacd80bb0a31bc0806203c8781992c5d4c9b1 /gcc | |
| parent | f341c03203d8e8ca9965b73c5709337687d32cc2 (diff) | |
| download | gcc-6eca10aa761c56b9a26763e036c72475337194f8.zip gcc-6eca10aa761c56b9a26763e036c72475337194f8.tar.gz gcc-6eca10aa761c56b9a26763e036c72475337194f8.tar.bz2 | |
aarch64: Use type-qualified builtins for ADDV Neon intrinsics
Declare unsigned type-qualified builtins and use them to implement
the vector reduction Neon intrinsics. This removes the need for many
casts in arm_neon.h.
gcc/ChangeLog:
2021-11-09 Jonathan Wright <jonathan.wright@arm.com>
* config/aarch64/aarch64-simd-builtins.def: Declare unsigned
builtins for vector reduction.
* config/aarch64/arm_neon.h (vaddv_u8): Use type-qualified
builtin and remove casts.
(vaddv_u16): Likewise.
(vaddv_u32): Likewise.
(vaddvq_u8): Likewise.
(vaddvq_u16): Likewise.
(vaddvq_u32): Likewise.
(vaddvq_u64): Likewise.
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/config/aarch64/aarch64-simd-builtins.def | 1 | ||||
| -rw-r--r-- | gcc/config/aarch64/arm_neon.h | 14 |
2 files changed, 8 insertions, 7 deletions
diff --git a/gcc/config/aarch64/aarch64-simd-builtins.def b/gcc/config/aarch64/aarch64-simd-builtins.def index f09ff8d..d9e9e11 100644 --- a/gcc/config/aarch64/aarch64-simd-builtins.def +++ b/gcc/config/aarch64/aarch64-simd-builtins.def @@ -513,6 +513,7 @@ /* Implemented by aarch64_reduc_plus_<mode>. */ BUILTIN_VALL (UNOP, reduc_plus_scal_, 10, NONE) + BUILTIN_VDQ_I (UNOPU, reduc_plus_scal_, 10, NONE) /* Implemented by reduc_<maxmin_uns>_scal_<mode> (producing scalar). */ BUILTIN_VDQIF_F16 (UNOP, reduc_smax_scal_, 10, NONE) diff --git a/gcc/config/aarch64/arm_neon.h b/gcc/config/aarch64/arm_neon.h index ce01623..743907e 100644 --- a/gcc/config/aarch64/arm_neon.h +++ b/gcc/config/aarch64/arm_neon.h @@ -9695,21 +9695,21 @@ __extension__ extern __inline uint8_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) vaddv_u8 (uint8x8_t __a) { - return (uint8_t) __builtin_aarch64_reduc_plus_scal_v8qi ((int8x8_t) __a); + return __builtin_aarch64_reduc_plus_scal_v8qi_uu (__a); } __extension__ extern __inline uint16_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) vaddv_u16 (uint16x4_t __a) { - return (uint16_t) __builtin_aarch64_reduc_plus_scal_v4hi ((int16x4_t) __a); + return __builtin_aarch64_reduc_plus_scal_v4hi_uu (__a); } __extension__ extern __inline uint32_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) vaddv_u32 (uint32x2_t __a) { - return (int32_t) __builtin_aarch64_reduc_plus_scal_v2si ((int32x2_t) __a); + return __builtin_aarch64_reduc_plus_scal_v2si_uu (__a); } __extension__ extern __inline int8_t @@ -9744,28 +9744,28 @@ __extension__ extern __inline uint8_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) vaddvq_u8 (uint8x16_t __a) { - return (uint8_t) __builtin_aarch64_reduc_plus_scal_v16qi ((int8x16_t) __a); + return __builtin_aarch64_reduc_plus_scal_v16qi_uu (__a); } __extension__ extern __inline uint16_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) vaddvq_u16 (uint16x8_t __a) { - return (uint16_t) __builtin_aarch64_reduc_plus_scal_v8hi ((int16x8_t) __a); + return __builtin_aarch64_reduc_plus_scal_v8hi_uu (__a); } __extension__ extern __inline uint32_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) vaddvq_u32 (uint32x4_t __a) { - return (uint32_t) __builtin_aarch64_reduc_plus_scal_v4si ((int32x4_t) __a); + return __builtin_aarch64_reduc_plus_scal_v4si_uu (__a); } __extension__ extern __inline uint64_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) vaddvq_u64 (uint64x2_t __a) { - return (uint64_t) __builtin_aarch64_reduc_plus_scal_v2di ((int64x2_t) __a); + return __builtin_aarch64_reduc_plus_scal_v2di_uu (__a); } __extension__ extern __inline float32_t |