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| author | Andrew Pinski <apinski@marvell.com> | 2020-01-11 20:34:24 +0000 |
|---|---|---|
| committer | Andrew Pinski <apinski@marvell.com> | 2020-01-24 21:33:43 +0000 |
| commit | 6ccc19bd4d12379a0d9fce486ceba3207749424a (patch) | |
| tree | febed7cc0aa767aa9fa74d10bfdfbe36eeb3bec8 /gcc | |
| parent | d54a86cd92860e1108f43fae9329ccb0897f3e1d (diff) | |
| download | gcc-6ccc19bd4d12379a0d9fce486ceba3207749424a.zip gcc-6ccc19bd4d12379a0d9fce486ceba3207749424a.tar.gz gcc-6ccc19bd4d12379a0d9fce486ceba3207749424a.tar.bz2 | |
Decrease cortexa57_extra_costs's alu.shift_reg
Like I mentioned in https://gcc.gnu.org/ml/gcc/2020-01/msg00157.html,
The shift by a register should be just COSTS_N_INSNS (1) rather than
COSTS_N_INSNS (2). This allows lshift_cheap_p to return true now
and converting switches to be using shift and other like
structures. I noticed this difference when I was working
through PR 93131 and understanding what reassoc could handle.
ChangeLog:
* config/arm/aarch-cost-tables.h (cortexa57_extra_costs): Change
alu.shift_reg to 0.
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/config/arm/aarch-cost-tables.h | 2 |
2 files changed, 6 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 4d851c0..bac1a9b 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2020-01-24 Andrew Pinski <apinski@marvell.com> + + * config/arm/aarch-cost-tables.h (cortexa57_extra_costs): Change + alu.shift_reg to 0. + 2020-01-24 Jeff Law <law@redhat.com> PR target/13721 diff --git a/gcc/config/arm/aarch-cost-tables.h b/gcc/config/arm/aarch-cost-tables.h index 6a30d92..cf81865 100644 --- a/gcc/config/arm/aarch-cost-tables.h +++ b/gcc/config/arm/aarch-cost-tables.h @@ -235,7 +235,7 @@ const struct cpu_cost_table cortexa57_extra_costs = 0, /* arith. */ 0, /* logical. */ 0, /* shift. */ - COSTS_N_INSNS (1), /* shift_reg. */ + 0, /* shift_reg. */ COSTS_N_INSNS (1), /* arith_shift. */ COSTS_N_INSNS (1), /* arith_shift_reg. */ COSTS_N_INSNS (1), /* log_shift. */ |