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author | Richard Sandiford <rdsandiford@googlemail.com> | 2014-06-04 17:34:19 +0000 |
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committer | Richard Sandiford <rsandifo@gcc.gnu.org> | 2014-06-04 17:34:19 +0000 |
commit | 5f2e0797aeb67a52d1b71859e054f55d1cd24ec7 (patch) | |
tree | 2d52f4da33819b6ccfd836b957991f7753751a0c /gcc | |
parent | 5efe5dec7a9db46a8514e6a0e1ef9bacc38cd807 (diff) | |
download | gcc-5f2e0797aeb67a52d1b71859e054f55d1cd24ec7.zip gcc-5f2e0797aeb67a52d1b71859e054f55d1cd24ec7.tar.gz gcc-5f2e0797aeb67a52d1b71859e054f55d1cd24ec7.tar.bz2 |
recog.c (preprocess_constraints): Don't skip disabled alternatives.
gcc/
* recog.c (preprocess_constraints): Don't skip disabled alternatives.
* ira-lives.c (check_and_make_def_conflict): Check for disabled
alternatives.
(make_early_clobber_and_input_conflicts): Likewise.
* config/i386/i386.c (ix86_legitimate_combined_insn): Likewise.
From-SVN: r211239
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/ChangeLog | 8 | ||||
-rw-r--r-- | gcc/config/i386/i386.c | 3 | ||||
-rw-r--r-- | gcc/ira-lives.c | 49 | ||||
-rw-r--r-- | gcc/recog.c | 6 |
4 files changed, 38 insertions, 28 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index c585b93..0cc10d2 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,13 @@ 2014-06-04 Richard Sandiford <rdsandiford@googlemail.com> + * recog.c (preprocess_constraints): Don't skip disabled alternatives. + * ira-lives.c (check_and_make_def_conflict): Check for disabled + alternatives. + (make_early_clobber_and_input_conflicts): Likewise. + * config/i386/i386.c (ix86_legitimate_combined_insn): Likewise. + +2014-06-04 Richard Sandiford <rdsandiford@googlemail.com> + * recog.h (alternative_class): New function. (which_op_alt): Return a const recog_op_alt. * reg-stack.c (check_asm_stack_operands): Update type accordingly. diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 21fa8f4..e0e55d5 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -5875,8 +5875,11 @@ ix86_legitimate_combined_insn (rtx insn) /* Operand has no constraints, anything is OK. */ win = !n_alternatives; + alternative_mask enabled = recog_data.enabled_alternatives; for (j = 0; j < n_alternatives; j++, op_alt += n_operands) { + if (!TEST_BIT (enabled, j)) + continue; if (op_alt[i].anything_ok || (op_alt[i].matches != -1 && operands_match_p diff --git a/gcc/ira-lives.c b/gcc/ira-lives.c index 34d4175..62e3768 100644 --- a/gcc/ira-lives.c +++ b/gcc/ira-lives.c @@ -641,8 +641,11 @@ check_and_make_def_conflict (int alt, int def, enum reg_class def_cl) /* If there's any alternative that allows USE to match DEF, do not record a conflict. If that causes us to create an invalid instruction due to the earlyclobber, reload must fix it up. */ + alternative_mask enabled = recog_data.enabled_alternatives; for (alt1 = 0; alt1 < recog_data.n_alternatives; alt1++) { + if (!TEST_BIT (enabled, alt1)) + continue; operand_alternative *op_alt1 = &recog_op_alt[alt1 * n_operands]; if (op_alt1[use].matches == def || (use < n_operands - 1 @@ -688,30 +691,32 @@ make_early_clobber_and_input_conflicts (void) int n_alternatives = recog_data.n_alternatives; int n_operands = recog_data.n_operands; + alternative_mask enabled = recog_data.enabled_alternatives; operand_alternative *op_alt = recog_op_alt; for (alt = 0; alt < n_alternatives; alt++, op_alt += n_operands) - for (def = 0; def < n_operands; def++) - { - def_cl = NO_REGS; - if (op_alt[def].earlyclobber) - { - if (op_alt[def].anything_ok) - def_cl = ALL_REGS; - else - def_cl = op_alt[def].cl; - check_and_make_def_conflict (alt, def, def_cl); - } - if ((def_match = op_alt[def].matches) >= 0 - && (op_alt[def_match].earlyclobber - || op_alt[def].earlyclobber)) - { - if (op_alt[def_match].anything_ok) - def_cl = ALL_REGS; - else - def_cl = op_alt[def_match].cl; - check_and_make_def_conflict (alt, def, def_cl); - } - } + if (TEST_BIT (enabled, alt)) + for (def = 0; def < n_operands; def++) + { + def_cl = NO_REGS; + if (op_alt[def].earlyclobber) + { + if (op_alt[def].anything_ok) + def_cl = ALL_REGS; + else + def_cl = op_alt[def].cl; + check_and_make_def_conflict (alt, def, def_cl); + } + if ((def_match = op_alt[def].matches) >= 0 + && (op_alt[def_match].earlyclobber + || op_alt[def].earlyclobber)) + { + if (op_alt[def_match].anything_ok) + def_cl = ALL_REGS; + else + def_cl = op_alt[def_match].cl; + check_and_make_def_conflict (alt, def, def_cl); + } + } } /* Mark early clobber hard registers of the current INSN as live (if diff --git a/gcc/recog.c b/gcc/recog.c index c4ab620..15e0752 100644 --- a/gcc/recog.c +++ b/gcc/recog.c @@ -2352,12 +2352,6 @@ preprocess_constraints (void) op_alt[i].matches = -1; op_alt[i].matched = -1; - if (!TEST_BIT (recog_data.enabled_alternatives, j)) - { - p = skip_alternative (p); - continue; - } - if (*p == '\0' || *p == ',') { op_alt[i].anything_ok = 1; |