diff options
author | Richard Henderson <rth@cygnus.com> | 1998-04-14 16:50:17 -0700 |
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committer | Richard Henderson <rth@gcc.gnu.org> | 1998-04-14 16:50:17 -0700 |
commit | 47747e5377c0a560d55b85c0d2494301f78d6df1 (patch) | |
tree | 239f30089ebcbdec67bcf0a8030e9464052abbc4 /gcc | |
parent | 7940255dd6ab541b5e6ab7780f151d0ec8af537c (diff) | |
download | gcc-47747e5377c0a560d55b85c0d2494301f78d6df1.zip gcc-47747e5377c0a560d55b85c0d2494301f78d6df1.tar.gz gcc-47747e5377c0a560d55b85c0d2494301f78d6df1.tar.bz2 |
alpha.md: Revert Oct 27 change...
* alpha.md: Revert Oct 27 change, as it is superceeded by Kenner's
Nov 8 find_replacement change. Move decls of get_unaligned_address
* alpha.h: ... here.
From-SVN: r19216
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/ChangeLog | 6 | ||||
-rw-r--r-- | gcc/config/alpha/alpha.h | 4 | ||||
-rw-r--r-- | gcc/config/alpha/alpha.md | 108 |
3 files changed, 30 insertions, 88 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 44c2a08..a554573 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +Tue Apr 14 23:39:13 1998 Richard Henderson <rth@cygnus.com> + + * alpha.md: Revert Oct 27 change, as it is superceeded by Kenner's + Nov 8 find_replacement change. Move decls of get_unaligned_address + * alpha.h: ... here. + Tue Apr 14 22:00:39 1998 John Carr <jfc@mit.edu> * function.c (assign_parms): Initialize unsignedp before passing diff --git a/gcc/config/alpha/alpha.h b/gcc/config/alpha/alpha.h index 127accc..7823d1c 100644 --- a/gcc/config/alpha/alpha.h +++ b/gcc/config/alpha/alpha.h @@ -2378,3 +2378,7 @@ do { \ /* The system headers under Alpha systems are generally C++-aware. */ #define NO_IMPLICIT_EXTERN_C + +/* Prototypes for alpha.c functions used in the md file. */ +extern struct rtx_def *get_unaligned_address (); + diff --git a/gcc/config/alpha/alpha.md b/gcc/config/alpha/alpha.md index d54df8c..f644168 100644 --- a/gcc/config/alpha/alpha.md +++ b/gcc/config/alpha/alpha.md @@ -1321,8 +1321,7 @@ (const_int 56)))] "" " -{ extern rtx get_unaligned_address (); - +{ if (TARGET_BWX) { emit_insn (gen_extendqidi2x (operands[0], @@ -1387,8 +1386,7 @@ (const_int 48)))] "" " -{ extern rtx get_unaligned_address (); - +{ if (TARGET_BWX) { emit_insn (gen_extendhidi2x (operands[0], @@ -4487,8 +4485,7 @@ (match_operand:QI 1 "general_operand" ""))] "" " -{ extern rtx get_unaligned_address (); - +{ if (TARGET_BWX) { if (GET_CODE (operands[0]) == MEM @@ -4532,18 +4529,6 @@ ? gen_rtx_REG (SImode, REGNO (operands[0])) : gen_reg_rtx (SImode)); - /* ??? This code creates a new MEM rtx. If we were called during - reload, then we must be careful to make sure that the new rtx - will not need reloading. */ - if (reload_in_progress - && GET_CODE (operands[1]) == MEM - && ! strict_memory_address_p (SImode, XEXP (operands[1], 0))) - { - rtx tmp = gen_rtx_REG (Pmode, REGNO (operands[0])); - emit_insn (gen_move_insn (tmp, XEXP (operands[1], 0))); - XEXP (operands[1], 0) = tmp; - } - get_aligned_mem (operands[1], &aligned_mem, &bitnum); emit_insn (gen_aligned_loadqi (operands[0], aligned_mem, bitnum, @@ -4611,8 +4596,7 @@ (match_operand:HI 1 "general_operand" ""))] "" " -{ extern rtx get_unaligned_address (); - +{ if (TARGET_BWX) { if (GET_CODE (operands[0]) == MEM @@ -4656,18 +4640,6 @@ ? gen_rtx_REG (SImode, REGNO (operands[0])) : gen_reg_rtx (SImode)); - /* ??? This code creates a new MEM rtx. If we were called during - reload, then we must be careful to make sure that the new rtx - will not need reloading. */ - if (reload_in_progress - && GET_CODE (operands[1]) == MEM - && ! strict_memory_address_p (SImode, XEXP (operands[1], 0))) - { - rtx tmp = gen_rtx_REG (Pmode, REGNO (operands[0])); - emit_insn (gen_move_insn (tmp, XEXP (operands[1], 0))); - XEXP (operands[1], 0) = tmp; - } - get_aligned_mem (operands[1], &aligned_mem, &bitnum); emit_insn (gen_aligned_loadhi (operands[0], aligned_mem, bitnum, @@ -4741,28 +4713,18 @@ (match_operand:TI 2 "register_operand" "=&r")])] "! TARGET_BWX" " -{ extern rtx get_unaligned_address (); - rtx addr, scratch, seq, tmp; +{ + rtx addr = get_unaligned_address (operands[1], 0); /* It is possible that one of the registers we got for operands[2] might coincide with that of operands[0] (which is why we made it TImode). Pick the other one to use as our scratch. */ - scratch = gen_rtx_REG (DImode, - REGNO (operands[0]) == REGNO (operands[2]) - ? REGNO (operands[2]) + 1 : REGNO (operands[2])); - - /* We must be careful to make sure that the new rtx won't need reloading. */ - if (GET_CODE (operands[1]) == MEM && - ! strict_memory_address_p (DImode, XEXP (operands[1], 0))) - { - tmp = gen_rtx_REG (Pmode, REGNO (operands[0])); - emit_insn (gen_move_insn (tmp, XEXP (operands[1], 0))); - XEXP (operands[1], 0) = tmp; - } - addr = get_unaligned_address (operands[1], 0); + rtx scratch = gen_rtx_REG (DImode, + REGNO (operands[0]) == REGNO (operands[2]) + ? REGNO (operands[2]) + 1 : REGNO (operands[2])); - seq = gen_unaligned_loadqi (operands[0], addr, scratch, - gen_rtx_REG (DImode, REGNO (operands[0]))); + rtx seq = gen_unaligned_loadqi (operands[0], addr, scratch, + gen_rtx_REG (DImode, REGNO (operands[0]))); alpha_set_memflags (seq, operands[1]); emit_insn (seq); @@ -4775,28 +4737,18 @@ (match_operand:TI 2 "register_operand" "=&r")])] "! TARGET_BWX" " -{ extern rtx get_unaligned_address (); - rtx scratch, seq, tmp, addr; +{ + rtx addr = get_unaligned_address (operands[1], 0); /* It is possible that one of the registers we got for operands[2] might coincide with that of operands[0] (which is why we made it TImode). Pick the other one to use as our scratch. */ - scratch = gen_rtx_REG (DImode, - REGNO (operands[0]) == REGNO (operands[2]) - ? REGNO (operands[2]) + 1 : REGNO (operands[2])); - - /* We must be careful to make sure that the new rtx won't need reloading. */ - if (GET_CODE (operands[1]) == MEM && - ! strict_memory_address_p (DImode, XEXP (operands[1], 0))) - { - tmp = gen_rtx_REG (Pmode, REGNO (operands[0])); - emit_insn (gen_move_insn (tmp, XEXP (operands[1], 0))); - XEXP (operands[1], 0) = tmp; - } - addr = get_unaligned_address (operands[1], 0); + rtx scratch = gen_rtx_REG (DImode, + REGNO (operands[0]) == REGNO (operands[2]) + ? REGNO (operands[2]) + 1 : REGNO (operands[2])); - seq = gen_unaligned_loadhi (operands[0], addr, scratch, - gen_rtx_REG (DImode, REGNO (operands[0]))); + rtx seq = gen_unaligned_loadhi (operands[0], addr, scratch, + gen_rtx_REG (DImode, REGNO (operands[0]))); alpha_set_memflags (seq, operands[1]); emit_insn (seq); @@ -4809,17 +4761,7 @@ (match_operand:TI 2 "register_operand" "=&r")])] "! TARGET_BWX" " -{ extern rtx get_unaligned_address (); - - /* Note that any_memory_operand allows pseudos during reload. */ - if (GET_CODE (operands[0]) == MEM && - ! strict_memory_address_p (DImode, XEXP (operands[0], 0))) - { - rtx scratch1 = gen_rtx_REG (DImode, REGNO (operands[2])); - emit_insn (gen_move_insn (scratch1, XEXP (operands[0], 0))); - XEXP (operands[0], 0) = scratch1; - } - +{ if (aligned_memory_operand (operands[0], QImode)) { rtx aligned_mem, bitnum; @@ -4857,17 +4799,7 @@ (match_operand:TI 2 "register_operand" "=&r")])] "! TARGET_BWX" " -{ extern rtx get_unaligned_address (); - - /* Note that any_memory_operand allows pseudos during reload. */ - if (GET_CODE (operands[0]) == MEM && - ! strict_memory_address_p (DImode, XEXP (operands[0], 0))) - { - rtx scratch1 = gen_rtx_REG (DImode, REGNO (operands[2])); - emit_insn (gen_move_insn (scratch1, XEXP (operands[0], 0))); - XEXP (operands[0], 0) = scratch1; - } - +{ if (aligned_memory_operand (operands[0], HImode)) { rtx aligned_mem, bitnum; |