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authorMatthew Wahab <matthew.wahab@arm.com>2016-06-29 12:37:00 +0000
committerMatthew Wahab <mwahab@gcc.gnu.org>2016-06-29 12:37:00 +0000
commit1af21224e417d96b363e2b7dec0cbb0e3ed78f99 (patch)
treef1f974a7ba08bd4973c2bf54f30ba7cfdd209b4f /gcc
parentabb67622cf2b192afc1956a6482f103d1a76f721 (diff)
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[ARM] Fix, add tests for FP16 aapcs.
testsuite/ * gcc.target/arm/aapcs/neon-vect10.c: Require -mfloat-ab=hard. Replace arm_neon_fp16_ok with arm_neon_fp16_hw. * gcc.target/arm/aapcs/neon-vect9.c: Likewise. * gcc.target/arm/aapcs/vfp18.c: Likewise. * gcc.target/arm/aapcs/vfp19.c: Likewise. * gcc.target/arm/aapcs/vfp20.c: Likewise. * gcc.target/arm/aapcs/vfp21.c: Likewise. * gcc.target/arm/fp16-aapcs-1.c: Require -mfloat-ab=hard. Also simplify the test. * gcc.target/arm/fp16-aapcs-2.c: New. From-SVN: r237849
Diffstat (limited to 'gcc')
-rw-r--r--gcc/testsuite/ChangeLog13
-rw-r--r--gcc/testsuite/gcc.target/arm/aapcs/neon-vect10.c3
-rw-r--r--gcc/testsuite/gcc.target/arm/aapcs/neon-vect9.c3
-rw-r--r--gcc/testsuite/gcc.target/arm/aapcs/vfp18.c7
-rw-r--r--gcc/testsuite/gcc.target/arm/aapcs/vfp19.c9
-rw-r--r--gcc/testsuite/gcc.target/arm/aapcs/vfp20.c9
-rw-r--r--gcc/testsuite/gcc.target/arm/aapcs/vfp21.c9
-rw-r--r--gcc/testsuite/gcc.target/arm/fp16-aapcs-1.c24
-rw-r--r--gcc/testsuite/gcc.target/arm/fp16-aapcs-2.c21
9 files changed, 71 insertions, 27 deletions
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index c51c1bc..c8f96a9 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,5 +1,18 @@
2016-06-29 Matthew Wahab <matthew.wahab@arm.com>
+ * gcc.target/arm/aapcs/neon-vect10.c: Require
+ -mfloat-ab=hard. Replace arm_neon_fp16_ok with arm_neon_fp16_hw.
+ * gcc.target/arm/aapcs/neon-vect9.c: Likewise.
+ * gcc.target/arm/aapcs/vfp18.c: Likewise.
+ * gcc.target/arm/aapcs/vfp19.c: Likewise.
+ * gcc.target/arm/aapcs/vfp20.c: Likewise.
+ * gcc.target/arm/aapcs/vfp21.c: Likewise.
+ * gcc.target/arm/fp16-aapcs-1.c: Require
+ -mfloat-ab=hard. Also simplify the test.
+ * gcc.target/arm/fp16-aapcs-2.c: New.
+
+2016-06-29 Matthew Wahab <matthew.wahab@arm.com>
+
* lib/target-supports.exp (add_options_for_arm_fp16): Reword
comment.
(add_options_for_arm_fp16_ieee): New.
diff --git a/gcc/testsuite/gcc.target/arm/aapcs/neon-vect10.c b/gcc/testsuite/gcc.target/arm/aapcs/neon-vect10.c
index 680a3b5..788079b 100644
--- a/gcc/testsuite/gcc.target/arm/aapcs/neon-vect10.c
+++ b/gcc/testsuite/gcc.target/arm/aapcs/neon-vect10.c
@@ -1,7 +1,8 @@
/* Test AAPCS layout (VFP variant for Neon types) */
/* { dg-do run { target arm_eabi } } */
-/* { dg-require-effective-target arm_neon_fp16_ok } */
+/* { dg-require-effective-target arm_hard_vfp_ok } */
+/* { dg-require-effective-target arm_neon_fp16_hw } */
/* { dg-add-options arm_neon_fp16 } */
#ifndef IN_FRAMEWORK
diff --git a/gcc/testsuite/gcc.target/arm/aapcs/neon-vect9.c b/gcc/testsuite/gcc.target/arm/aapcs/neon-vect9.c
index fc2b13b..b42fdd2 100644
--- a/gcc/testsuite/gcc.target/arm/aapcs/neon-vect9.c
+++ b/gcc/testsuite/gcc.target/arm/aapcs/neon-vect9.c
@@ -1,7 +1,8 @@
/* Test AAPCS layout (VFP variant for Neon types) */
/* { dg-do run { target arm_eabi } } */
-/* { dg-require-effective-target arm_neon_fp16_ok } */
+/* { dg-require-effective-target arm_hard_vfp_ok } */
+/* { dg-require-effective-target arm_neon_fp16_hw } */
/* { dg-add-options arm_neon_fp16 } */
#ifndef IN_FRAMEWORK
diff --git a/gcc/testsuite/gcc.target/arm/aapcs/vfp18.c b/gcc/testsuite/gcc.target/arm/aapcs/vfp18.c
index 225e9ce..0745a82 100644
--- a/gcc/testsuite/gcc.target/arm/aapcs/vfp18.c
+++ b/gcc/testsuite/gcc.target/arm/aapcs/vfp18.c
@@ -1,8 +1,9 @@
-/* Test AAPCS layout (VFP variant) */
+/* Test AAPCS layout (VFP variant) */
/* { dg-do run { target arm_eabi } } */
-/* { dg-require-effective-target arm_neon_fp16_ok } */
-/* { dg-options "-O -mfpu=vfp -mfloat-abi=hard -mfp16-format=ieee" } */
+/* { dg-require-effective-target arm_hard_vfp_ok } */
+/* { dg-require-effective-target arm_fp16_hw } */
+/* { dg-add-options arm_fp16_ieee } */
#ifndef IN_FRAMEWORK
#define VFP
diff --git a/gcc/testsuite/gcc.target/arm/aapcs/vfp19.c b/gcc/testsuite/gcc.target/arm/aapcs/vfp19.c
index 8928b15..950c1f6 100644
--- a/gcc/testsuite/gcc.target/arm/aapcs/vfp19.c
+++ b/gcc/testsuite/gcc.target/arm/aapcs/vfp19.c
@@ -1,8 +1,9 @@
-/* Test AAPCS layout (VFP variant) */
+/* Test AAPCS layout (VFP variant) */
-/* { dg-do run { target arm_eabi } } */
-/* { dg-require-effective-target arm_neon_fp16_ok } */
-/* { dg-options "-O -mfpu=vfp -mfloat-abi=hard -mfp16-format=ieee" } */
+/* { dg-do run { target arm_eabi } } */
+/* { dg-require-effective-target arm_hard_vfp_ok } */
+/* { dg-require-effective-target arm_fp16_hw } */
+/* { dg-add-options arm_fp16_ieee } */
#ifndef IN_FRAMEWORK
#define VFP
diff --git a/gcc/testsuite/gcc.target/arm/aapcs/vfp20.c b/gcc/testsuite/gcc.target/arm/aapcs/vfp20.c
index 61f0704..f898d4c 100644
--- a/gcc/testsuite/gcc.target/arm/aapcs/vfp20.c
+++ b/gcc/testsuite/gcc.target/arm/aapcs/vfp20.c
@@ -1,8 +1,9 @@
-/* Test AAPCS layout (VFP variant) */
+/* Test AAPCS layout (VFP variant) */
-/* { dg-do run { target arm_eabi } } */
-/* { dg-require-effective-target arm_neon_fp16_ok } */
-/* { dg-options "-O -mfpu=vfp -mfloat-abi=hard -mfp16-format=ieee" } */
+/* { dg-do run { target arm_eabi } } */
+/* { dg-require-effective-target arm_hard_vfp_ok } */
+/* { dg-require-effective-target arm_fp16_hw } */
+/* { dg-add-options arm_fp16_ieee } */
#ifndef IN_FRAMEWORK
#define VFP
diff --git a/gcc/testsuite/gcc.target/arm/aapcs/vfp21.c b/gcc/testsuite/gcc.target/arm/aapcs/vfp21.c
index 15dff7d..48bb598 100644
--- a/gcc/testsuite/gcc.target/arm/aapcs/vfp21.c
+++ b/gcc/testsuite/gcc.target/arm/aapcs/vfp21.c
@@ -1,8 +1,9 @@
-/* Test AAPCS layout (VFP variant) */
+/* Test AAPCS layout (VFP variant) */
-/* { dg-do run { target arm_eabi } } */
-/* { dg-require-effective-target arm_neon_fp16_ok } */
-/* { dg-options "-O -mfpu=vfp -mfloat-abi=hard -mfp16-format=ieee" } */
+/* { dg-do run { target arm_eabi } } */
+/* { dg-require-effective-target arm_hard_vfp_ok } */
+/* { dg-require-effective-target arm_fp16_hw } */
+/* { dg-add-options arm_fp16_ieee } */
#ifndef IN_FRAMEWORK
#define VFP
diff --git a/gcc/testsuite/gcc.target/arm/fp16-aapcs-1.c b/gcc/testsuite/gcc.target/arm/fp16-aapcs-1.c
index 5eab3e2..9bf3fc0 100644
--- a/gcc/testsuite/gcc.target/arm/fp16-aapcs-1.c
+++ b/gcc/testsuite/gcc.target/arm/fp16-aapcs-1.c
@@ -1,17 +1,21 @@
/* { dg-do compile } */
+/* { dg-require-effective-target arm_hard_vfp_ok } */
/* { dg-require-effective-target arm_fp16_ok } */
-/* { dg-options "-mfp16-format=ieee -O2" } */
-/* { dg-add-options arm_fp16 } */
+/* { dg-options "-O2" } */
+/* { dg-add-options arm_fp16_ieee } */
-/* Test __fp16 arguments and return value in registers. */
+/* Test __fp16 arguments and return value in registers (hard-float). */
-__fp16 F (__fp16 a, __fp16 b, __fp16 c)
+void
+swap (__fp16, __fp16);
+
+__fp16
+F (__fp16 a, __fp16 b, __fp16 c)
{
- if (a == b)
- return c;
- return a;
+ swap (b, a);
+ return c;
}
-/* { dg-final { scan-assembler-times {vcvtb\.f32\.f16\ts[0-9]+, s0} 1 } } */
-/* { dg-final { scan-assembler-times {vcvtb\.f32\.f16\ts[0-9]+, s1} 1 } } */
-/* { dg-final { scan-assembler-times {vmov\ts0, r[0-9]+} 1 } } */
+/* { dg-final { scan-assembler-times {vmov\tr[0-9]+, s[0-2]} 2 } } */
+/* { dg-final { scan-assembler-times {vmov.f32\ts1, s0} 1 } } */
+/* { dg-final { scan-assembler-times {vmov\ts0, r[0-9]+} 2 } } */
diff --git a/gcc/testsuite/gcc.target/arm/fp16-aapcs-2.c b/gcc/testsuite/gcc.target/arm/fp16-aapcs-2.c
new file mode 100644
index 0000000..4753e36
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/fp16-aapcs-2.c
@@ -0,0 +1,21 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_fp16_ok } */
+/* { dg-options "-mfloat-abi=softfp -O2" } */
+/* { dg-add-options arm_fp16_ieee } */
+/* { dg-skip-if "incompatible float-abi" { arm*-*-* } { "-mfloat-abi=hard" } } */
+
+/* Test __fp16 arguments and return value in registers (softfp). */
+
+void
+swap (__fp16, __fp16);
+
+__fp16
+F (__fp16 a, __fp16 b, __fp16 c)
+{
+ swap (b, a);
+ return c;
+}
+
+/* { dg-final { scan-assembler-times {mov\tr[0-9]+, r[0-2]} 3 } } */
+/* { dg-final { scan-assembler-times {mov\tr1, r0} 1 } } */
+/* { dg-final { scan-assembler-times {mov\tr0, r[0-9]+} 2 } } */