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| author | Andreas Krebbel <krebbel@linux.ibm.com> | 2020-10-26 11:41:55 +0100 |
|---|---|---|
| committer | Andreas Krebbel <krebbel@linux.ibm.com> | 2020-10-26 11:42:06 +0100 |
| commit | 19534269d899c4810b7b12e00cc4b1deb9e7b495 (patch) | |
| tree | 383b52586fe7dac70d05300357570ea0f7e03cc5 /gcc | |
| parent | 50f9e1f4d458e36d306b2449c689e45492847f68 (diff) | |
| download | gcc-19534269d899c4810b7b12e00cc4b1deb9e7b495.zip gcc-19534269d899c4810b7b12e00cc4b1deb9e7b495.tar.gz gcc-19534269d899c4810b7b12e00cc4b1deb9e7b495.tar.bz2 | |
IBM Z: Add vcond_mask expander
After adding vec_cmp expanders we have seen various performance
related regression in the testsuite. These appear to be caused by a
missing vcond_mask definition in the backend. Fixed with this patch.
The patch fixes the following testsuite fails:
FAIL: gcc.dg/vect/vect-21.c -flto -ffat-lto-objects scan-tree-dump-times vect "vectorized 3 loops" 1
FAIL: gcc.dg/vect/vect-21.c scan-tree-dump-times vect "vectorized 3 loops" 1
FAIL: gcc.dg/vect/vect-23.c -flto -ffat-lto-objects scan-tree-dump-times vect "vectorized 3 loops" 1
FAIL: gcc.dg/vect/vect-23.c scan-tree-dump-times vect "vectorized 3 loops" 1
FAIL: gcc.dg/vect/vect-24.c -flto -ffat-lto-objects scan-tree-dump-times vect "vectorized 3 loops" 1
FAIL: gcc.dg/vect/vect-24.c scan-tree-dump-times vect "vectorized 3 loops" 1
FAIL: gcc.dg/vect/vect-live-6.c -flto -ffat-lto-objects scan-tree-dump vect "vectorized 1 loops"
FAIL: gcc.dg/vect/vect-live-6.c scan-tree-dump vect "vectorized 1 loops"
FAIL: gcc.target/s390/vector/vcond-shift.c scan-assembler-times vesrab\\t%v.?,%v.?,7 6
FAIL: gcc.target/s390/vector/vcond-shift.c scan-assembler-times vesraf\\t%v.?,%v.?,31 6
FAIL: gcc.target/s390/vector/vcond-shift.c scan-assembler-times vesrah\\t%v.?,%v.?,15 6
FAIL: gcc.target/s390/vector/vcond-shift.c scan-assembler-times vesrlb\\t%v.?,%v.?,7 4
FAIL: gcc.target/s390/vector/vcond-shift.c scan-assembler-times vesrlf\\t%v.?,%v.?,31 4
FAIL: gcc.target/s390/vector/vcond-shift.c scan-assembler-times vesrlh\\t%v.?,%v.?,15 4
FAIL: gcc.dg/vect/vect-21.c -flto -ffat-lto-objects scan-tree-dump-times vect "vectorized 3 loops" 1
FAIL: gcc.dg/vect/vect-21.c scan-tree-dump-times vect "vectorized 3 loops" 1
FAIL: gcc.dg/vect/vect-23.c -flto -ffat-lto-objects scan-tree-dump-times vect "vectorized 3 loops" 1
FAIL: gcc.dg/vect/vect-23.c scan-tree-dump-times vect "vectorized 3 loops" 1
FAIL: gcc.dg/vect/vect-24.c -flto -ffat-lto-objects scan-tree-dump-times vect "vectorized 3 loops" 1
FAIL: gcc.dg/vect/vect-24.c scan-tree-dump-times vect "vectorized 3 loops" 1
FAIL: gcc.dg/vect/vect-live-6.c -flto -ffat-lto-objects scan-tree-dump vect "vectorized 1 loops"
FAIL: gcc.dg/vect/vect-live-6.c scan-tree-dump vect "vectorized 1 loops"
FAIL: gcc.target/s390/vector/vcond-shift.c scan-assembler-times vesrab\\t%v.?,%v.?,7 6
FAIL: gcc.target/s390/vector/vcond-shift.c scan-assembler-times vesraf\\t%v.?,%v.?,31 6
FAIL: gcc.target/s390/vector/vcond-shift.c scan-assembler-times vesrah\\t%v.?,%v.?,15 6
FAIL: gcc.target/s390/vector/vcond-shift.c scan-assembler-times vesrlb\\t%v.?,%v.?,7 4
FAIL: gcc.target/s390/vector/vcond-shift.c scan-assembler-times vesrlf\\t%v.?,%v.?,31 4
FAIL: gcc.target/s390/vector/vcond-shift.c scan-assembler-times vesrlh\\t%v.?,%v.?,15 4
gcc/ChangeLog:
* config/s390/vector.md ("vcond_mask_<mode><mode>"): New expander.
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/config/s390/vector.md | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/gcc/config/s390/vector.md b/gcc/config/s390/vector.md index 3c01cd1..3e621da 100644 --- a/gcc/config/s390/vector.md +++ b/gcc/config/s390/vector.md @@ -658,6 +658,17 @@ DONE; }) +(define_expand "vcond_mask_<mode><mode>" + [(set (match_operand:V 0 "register_operand" "") + (if_then_else:V + (eq (match_operand:<tointvec> 3 "register_operand" "") + (match_dup 4)) + (match_operand:V 2 "register_operand" "") + (match_operand:V 1 "register_operand" "")))] + "TARGET_VX" + "operands[4] = CONST0_RTX (<tointvec>mode);") + + ; We only have HW support for byte vectors. The middle-end is ; supposed to lower the mode if required. (define_insn "vec_permv16qi" |