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author | GCC Administrator <gccadmin@gcc.gnu.org> | 2023-09-12 00:17:50 +0000 |
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committer | GCC Administrator <gccadmin@gcc.gnu.org> | 2023-09-12 00:17:50 +0000 |
commit | fb4b53d964b797e5f3380726175c95110c4ff9ff (patch) | |
tree | 04303fe427a423dbf6c40578bd8dc1836892482b /gcc | |
parent | fbd72a2108d1c05ef7f50acd71d518e769abcced (diff) | |
download | gcc-fb4b53d964b797e5f3380726175c95110c4ff9ff.zip gcc-fb4b53d964b797e5f3380726175c95110c4ff9ff.tar.gz gcc-fb4b53d964b797e5f3380726175c95110c4ff9ff.tar.bz2 |
Daily bump.
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/ChangeLog | 142 | ||||
-rw-r--r-- | gcc/DATESTAMP | 2 | ||||
-rw-r--r-- | gcc/m2/ChangeLog | 7 | ||||
-rw-r--r-- | gcc/rust/ChangeLog | 13 | ||||
-rw-r--r-- | gcc/testsuite/ChangeLog | 53 |
5 files changed, 216 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 40c3674..3038031 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,145 @@ +2023-09-11 Andrew Pinski <apinski@marvell.com> + + PR tree-optimization/111348 + * match.pd (`(a CMP b) ? minmax<a, c> : minmax<b, c>`): Add :c on + the cmp part of the pattern. + +2023-09-11 Uros Bizjak <ubizjak@gmail.com> + + PR target/111340 + * config/i386/i386.cc (output_pic_addr_const): Handle CONST_WIDE_INT. + Call output_addr_const for CASE_CONST_SCALAR_INT. + +2023-09-11 Edwin Lu <ewlu@rivosinc.com> + + * config/riscv/thead.md: Update types + +2023-09-11 Edwin Lu <ewlu@rivosinc.com> + + * config/riscv/riscv.md: Update types + +2023-09-11 Edwin Lu <ewlu@rivosinc.com> + + * config/riscv/riscv.md: Add "zicond" type + * config/riscv/zicond.md: Update types + +2023-09-11 Edwin Lu <ewlu@rivosinc.com> + + * config/riscv/riscv.md: Add "pushpop" and "mvpair" types + * config/riscv/zc.md: Update types + +2023-09-11 Edwin Lu <ewlu@rivosinc.com> + + * config/riscv/autovec-opt.md: Update types + * config/riscv/autovec.md: likewise + +2023-09-11 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com> + + * config/s390/s390-builtins.def (s390_vec_signed_flt): Fix + builtin flag. + (s390_vec_unsigned_flt): Ditto. + (s390_vec_revb_flt): Ditto. + (s390_vec_reve_flt): Ditto. + (s390_vclfnhs): Fix operand flags. + (s390_vclfnls): Ditto. + (s390_vcrnfs): Ditto. + (s390_vcfn): Ditto. + (s390_vcnf): Ditto. + +2023-09-11 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com> + + * config/s390/s390-builtins.def (O_U64): New. + (O1_U64): Ditto. + (O2_U64): Ditto. + (O3_U64): Ditto. + (O4_U64): Ditto. + (O_M12): Change bit position. + (O_S2): Ditto. + (O_S3): Ditto. + (O_S4): Ditto. + (O_S5): Ditto. + (O_S8): Ditto. + (O_S12): Ditto. + (O_S16): Ditto. + (O_S32): Ditto. + (O_ELEM): Ditto. + (O_LIT): Ditto. + (OB_DEF_VAR): Add operand constraints. + (B_DEF): Ditto. + * config/s390/s390.cc (s390_const_operand_ok): Honour 64 bit + operands. + +2023-09-11 Andrew Pinski <apinski@marvell.com> + + PR tree-optimization/111349 + * match.pd (`(a CMP CST1) ? max<a,CST2> : a`): Add :c on + the cmp part of the pattern. + +2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai> + + PR target/111311 + * config/riscv/riscv.opt: Set default as scalable vectorization. + +2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai> + + * config/riscv/riscv-protos.h (get_all_predecessors): Remove. + (get_all_successors): Ditto. + * config/riscv/riscv-v.cc (get_all_predecessors): Ditto. + (get_all_successors): Ditto. + +2023-09-11 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/111329 + * pretty-print.h (pp_wide_int): Rewrite from macro into inline + function. For printing values which don't fit into digit_buffer + use out-of-line function. + * wide-int-print.h (pp_wide_int_large): Declare. + * wide-int-print.cc: Include pretty-print.h. + (pp_wide_int_large): Define. + +2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai> + + * config/riscv/riscv-vsetvl.cc (pass_vsetvl::global_eliminate_vsetvl_insn): + Use dominance analysis. + (pass_vsetvl::init): Ditto. + (pass_vsetvl::done): Ditto. + +2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai> + + PR target/111311 + * config/riscv/autovec.md: Add VLS modes. + * config/riscv/riscv-protos.h (cmp_lmul_le_one): New function. + (cmp_lmul_gt_one): Ditto. + * config/riscv/riscv-v.cc (cmp_lmul_le_one): Ditto. + (cmp_lmul_gt_one): Ditto. + * config/riscv/riscv.cc (riscv_print_operand): Add VLS modes. + (riscv_vectorize_vec_perm_const): Ditto. + * config/riscv/vector-iterators.md: Ditto. + * config/riscv/vector.md: Ditto. + +2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai> + + * config/riscv/autovec-vls.md (*mov<mode>_vls): New pattern. + * config/riscv/vector-iterators.md: New iterator + +2023-09-11 Andrew Pinski <apinski@marvell.com> + + PR tree-optimization/111346 + * match.pd (`X CMP MINMAX`): Add `:c` on the cmp part + of the pattern + +2023-09-11 liuhongt <hongtao.liu@intel.com> + + PR target/111306 + PR target/111335 + * config/i386/sse.md (int_comm): New int_attr. + (fma_<complexopname>_<mode><sdc_maskz_name><round_name>): + Remove % for Complex conjugate operations since they're not + commutative. + (fma_<complexpairopname>_<mode>_pair): Ditto. + (<avx512>_<complexopname>_<mode>_mask<round_name>): Ditto. + (cmul<conj_op><mode>3): Ditto. + 2023-09-10 Juzhe-Zhong <juzhe.zhong@rivai.ai> * config/riscv/riscv-v.cc (shuffle_generic_patterns): Expand diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP index 0799209..9cb5371 100644 --- a/gcc/DATESTAMP +++ b/gcc/DATESTAMP @@ -1 +1 @@ -20230911 +20230912 diff --git a/gcc/m2/ChangeLog b/gcc/m2/ChangeLog index 847412a..b782697 100644 --- a/gcc/m2/ChangeLog +++ b/gcc/m2/ChangeLog @@ -1,3 +1,10 @@ +2023-09-11 Gaius Mulley <gaiusmod2@gmail.com> + + PR modula2/111330 + * gm2-compiler/M2SymInit.mod (CheckReadBeforeInitQuad): Add + case labels LogicalDiffOp, DummyOp, OptParamOp and + InitAddressOp. + 2023-08-20 Gaius Mulley <gaiusmod2@gmail.com> PR modula2/111085 diff --git a/gcc/rust/ChangeLog b/gcc/rust/ChangeLog index 31a6ede..bbcbc29 100644 --- a/gcc/rust/ChangeLog +++ b/gcc/rust/ChangeLog @@ -1,3 +1,16 @@ +2023-09-11 Parthib <94271200+Parthib314@users.noreply.github.com> + + * Make-lang.in: Removed rust-gcc-diagnostics object file. + * rust-diagnostics.cc (rust_be_get_quotechars): Added from original file. + (rust_be_internal_error_at): Likewise. + (rust_be_error_at): Likewise. + (class rust_error_code_rule): Likewise. + (rust_be_warning_at): Likewise. + (rust_be_fatal_error): Likewise. + (rust_be_inform): Likewise. + (rust_be_debug_p): Likewise. + * rust-gcc-diagnostics.cc: Removed. + 2023-09-07 David Malcolm <dmalcolm@redhat.com> * rust-diagnostics.cc (rust_error_at): New overload. diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 96520fb..08f79b9 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,56 @@ +2023-09-11 Andrew Pinski <apinski@marvell.com> + + PR tree-optimization/111348 + * gcc.dg/tree-ssa/minmax-26.c: New test. + +2023-09-11 Uros Bizjak <ubizjak@gmail.com> + + PR target/111340 + * gcc.target/i386/pr111340.c: New test. + +2023-09-11 Andrew Pinski <apinski@marvell.com> + + PR tree-optimization/111349 + * gcc.dg/tree-ssa/minmax-25.c: New test. + +2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai> + + PR target/111311 + * gcc.target/riscv/rvv/autovec/partial/slp-1.c: Adapt test. + * gcc.target/riscv/rvv/autovec/partial/slp-16.c: Ditto. + * gcc.target/riscv/rvv/autovec/partial/slp-17.c: Ditto. + * gcc.target/riscv/rvv/autovec/partial/slp-3.c: Ditto. + * gcc.target/riscv/rvv/autovec/partial/slp-5.c: Ditto. + * gcc.target/riscv/rvv/autovec/vls/compress-1.c: New test. + * gcc.target/riscv/rvv/autovec/vls/compress-2.c: New test. + * gcc.target/riscv/rvv/autovec/vls/compress-3.c: New test. + * gcc.target/riscv/rvv/autovec/vls/compress-4.c: New test. + * gcc.target/riscv/rvv/autovec/vls/compress-5.c: New test. + * gcc.target/riscv/rvv/autovec/vls/compress-6.c: New test. + * gcc.target/riscv/rvv/autovec/vls/merge-1.c: New test. + * gcc.target/riscv/rvv/autovec/vls/merge-2.c: New test. + * gcc.target/riscv/rvv/autovec/vls/merge-3.c: New test. + * gcc.target/riscv/rvv/autovec/vls/merge-4.c: New test. + * gcc.target/riscv/rvv/autovec/vls/merge-5.c: New test. + * gcc.target/riscv/rvv/autovec/vls/merge-6.c: New test. + * gcc.target/riscv/rvv/autovec/vls/merge-7.c: New test. + * gcc.target/riscv/rvv/autovec/vls/perm-1.c: New test. + * gcc.target/riscv/rvv/autovec/vls/perm-2.c: New test. + * gcc.target/riscv/rvv/autovec/vls/perm-3.c: New test. + * gcc.target/riscv/rvv/autovec/vls/perm-4.c: New test. + * gcc.target/riscv/rvv/autovec/vls/perm-5.c: New test. + * gcc.target/riscv/rvv/autovec/vls/perm-6.c: New test. + * gcc.target/riscv/rvv/autovec/vls/perm-7.c: New test. + +2023-09-11 Andrew Pinski <apinski@marvell.com> + + PR tree-optimization/111346 + * gcc.dg/tree-ssa/minmaxcmp-1.c: New test. + +2023-09-11 liuhongt <hongtao.liu@intel.com> + + * gcc.target/i386/pr111306.c: New test. + 2023-09-10 Andrew Pinski <apinski@marvell.com> PR tree-optimization/111331 |