aboutsummaryrefslogtreecommitdiff
path: root/gcc
diff options
context:
space:
mode:
authorUros Bizjak <uros@gcc.gnu.org>2007-02-16 19:36:01 +0100
committerUros Bizjak <uros@gcc.gnu.org>2007-02-16 19:36:01 +0100
commitfa681e3960f7fc93b48e06bfb4131371a9e9b3ad (patch)
tree1833442ed772629bbb3c8f04dd569abd773e57b0 /gcc
parentce359ed91662f2c14f882613a094f75110a0eba2 (diff)
downloadgcc-fa681e3960f7fc93b48e06bfb4131371a9e9b3ad.zip
gcc-fa681e3960f7fc93b48e06bfb4131371a9e9b3ad.tar.gz
gcc-fa681e3960f7fc93b48e06bfb4131371a9e9b3ad.tar.bz2
i386.h (x86_use_xchgb): New.
* config/i386/i386.h (x86_use_xchgb): New. (TARGET_USE_XCHGB): New macro. * config/i386/i386.c (x86_use_xchgb): Set for PENT4. * config/i386/i386.md (*rotlhi3_1 splitter, *rotrhi3_1 splitter): Split after reload into bswaphi for shifts of 8. (bswaphi_lowpart): Generate rolw insn for HImode byte swaps. (*bswaphi_lowpart_1): Generate xchgb for Q registers for TARGET_XCHGB or when optimizing for size. testsuite/ChangeLog: * gcc.target/i386/builtin-bswap-1.c: Remove -march=nocona. * gcc.target/i386/builtin-bswap-3.c: Ditto. * gcc.target/i386/xchg-1.c: New test. * gcc.target/i386/xchg-2.c: New test. From-SVN: r122049
Diffstat (limited to 'gcc')
-rw-r--r--gcc/ChangeLog13
-rw-r--r--gcc/config/i386/i386.c2
-rw-r--r--gcc/config/i386/i386.h5
-rw-r--r--gcc/config/i386/i386.md47
-rw-r--r--gcc/testsuite/ChangeLog9
-rw-r--r--gcc/testsuite/gcc.target/i386/builtin-bswap-1.c2
-rw-r--r--gcc/testsuite/gcc.target/i386/builtin-bswap-3.c2
-rw-r--r--gcc/testsuite/gcc.target/i386/xchg-1.c9
-rw-r--r--gcc/testsuite/gcc.target/i386/xchg-2.c9
9 files changed, 83 insertions, 15 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 5d49c88..d639344 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,16 @@
+2007-02-16 Uros Bizjak <ubizjak@gmail.com>
+
+ * config/i386/i386.h (x86_use_xchgb): New.
+ (TARGET_USE_XCHGB): New macro.
+ * config/i386/i386.c (x86_use_xchgb): Set for PENT4.
+ * config/i386/i386.md (*rotlhi3_1 splitter, *rotrhi3_1 splitter):
+ Split after reload into bswaphi for shifts of 8.
+ (bswaphi_lowpart): Generate rolw insn for HImode byte swaps.
+ (*bswaphi_lowpart_1): Generate xchgb for Q registers for TARGET_XCHGB
+ or when optimizing for size.
+
2007-02-16 Richard Guenther <rguenther@suse.de>
- Christian Bruel <christian.bruel@st.com>
+ Christian Bruel <christian.bruel@st.com>
* fold-const.c (tree_swap_operands_p): Treat SSA_NAMEs like
DECLs but prefer SSA_NAMEs over DECLs.
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index ff5766c..8ad98d8 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -1044,6 +1044,8 @@ const int x86_use_simode_fiop = ~(m_PPRO | m_ATHLON_K8_AMDFAM10 | m_PENT
| m_CORE2 | m_GENERIC);
const int x86_use_mov0 = m_K6;
const int x86_use_cltd = ~(m_PENT | m_K6 | m_CORE2 | m_GENERIC);
+/* Use xchgb %rh,%rl instead of rolw/rorw $8,rx. */
+const int x86_use_xchgb = m_PENT4;
const int x86_read_modify_write = ~m_PENT;
const int x86_read_modify = ~(m_PENT | m_PPRO);
const int x86_split_long_moves = m_PPRO;
diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h
index 72dec0a..1664a8f 100644
--- a/gcc/config/i386/i386.h
+++ b/gcc/config/i386/i386.h
@@ -185,8 +185,8 @@ extern const int x86_use_bit_test, x86_cmove, x86_deep_branch;
extern const int x86_branch_hints, x86_unroll_strlen;
extern const int x86_double_with_add, x86_partial_reg_stall, x86_movx;
extern const int x86_use_himode_fiop, x86_use_simode_fiop;
-extern const int x86_use_mov0, x86_use_cltd, x86_read_modify_write;
-extern const int x86_read_modify, x86_split_long_moves;
+extern const int x86_use_mov0, x86_use_cltd, x86_use_xchgb;
+extern const int x86_read_modify_write, x86_read_modify, x86_split_long_moves;
extern const int x86_promote_QImode, x86_single_stringop, x86_fast_prefix;
extern const int x86_himode_math, x86_qimode_math, x86_promote_qi_regs;
extern const int x86_promote_hi_regs, x86_integer_DFmode_moves;
@@ -228,6 +228,7 @@ extern int x86_prefetch_sse, x86_cmpxchg16b;
#define TARGET_USE_SIMODE_FIOP (x86_use_simode_fiop & TUNEMASK)
#define TARGET_USE_MOV0 (x86_use_mov0 & TUNEMASK)
#define TARGET_USE_CLTD (x86_use_cltd & TUNEMASK)
+#define TARGET_USE_XCHGB (x86_use_xchgb & TUNEMASK)
#define TARGET_SPLIT_LONG_MOVES (x86_split_long_moves & TUNEMASK)
#define TARGET_READ_MODIFY_WRITE (x86_read_modify_write & TUNEMASK)
#define TARGET_READ_MODIFY (x86_read_modify & TUNEMASK)
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 246a6b9..ad7ae22 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -13025,6 +13025,16 @@
[(set_attr "type" "rotate")
(set_attr "mode" "HI")])
+(define_split
+ [(set (match_operand:HI 0 "register_operand" "")
+ (rotate:HI (match_dup 0) (const_int 8)))
+ (clobber (reg:CC FLAGS_REG))]
+ "reload_completed"
+ [(parallel [(set (strict_low_part (match_dup 0))
+ (bswap:HI (match_dup 0)))
+ (clobber (reg:CC FLAGS_REG))])]
+ "")
+
(define_expand "rotlqi3"
[(set (match_operand:QI 0 "nonimmediate_operand" "")
(rotate:QI (match_operand:QI 1 "nonimmediate_operand" "")
@@ -13240,7 +13250,7 @@
(const_string "2")
(const_string "*")))])
-(define_insn "*rotrhi3"
+(define_insn "*rotrhi3_1"
[(set (match_operand:HI 0 "nonimmediate_operand" "=rm,rm")
(rotatert:HI (match_operand:HI 1 "nonimmediate_operand" "0,0")
(match_operand:QI 2 "nonmemory_operand" "I,c")))
@@ -13252,6 +13262,16 @@
[(set_attr "type" "rotate")
(set_attr "mode" "HI")])
+(define_split
+ [(set (match_operand:HI 0 "register_operand" "")
+ (rotatert:HI (match_dup 0) (const_int 8)))
+ (clobber (reg:CC FLAGS_REG))]
+ "reload_completed"
+ [(parallel [(set (strict_low_part (match_dup 0))
+ (bswap:HI (match_dup 0)))
+ (clobber (reg:CC FLAGS_REG))])]
+ "")
+
(define_expand "rotrqi3"
[(set (match_operand:QI 0 "nonimmediate_operand" "")
(rotatert:QI (match_operand:QI 1 "nonimmediate_operand" "")
@@ -15016,16 +15036,25 @@
[(set_attr "prefix_0f" "1")
(set_attr "length" "2")])
+(define_insn "*bswaphi_lowpart_1"
+ [(set (strict_low_part (match_operand:HI 0 "register_operand" "+Q,r"))
+ (bswap:HI (match_dup 0)))
+ (clobber (reg:CC FLAGS_REG))]
+ "TARGET_USE_XCHGB || optimize_size"
+ "@
+ xchg{b}\t{%h0, %b0|%b0, %h0}
+ rol{w}\t{$8, %0|%0, 8}"
+ [(set_attr "length" "2,4")
+ (set_attr "mode" "QI,HI")])
+
(define_insn "bswaphi_lowpart"
- [(set (strict_low_part (match_operand:HI 0 "register_operand" "+Q"))
- (bswap:HI (match_dup 0)))]
+ [(set (strict_low_part (match_operand:HI 0 "register_operand" "+r"))
+ (bswap:HI (match_dup 0)))
+ (clobber (reg:CC FLAGS_REG))]
""
- "xchg{b}\t%h0, %b0"
- [(set_attr "type" "alu1")
- (set_attr "mode" "QI")
- (set_attr "pent_pair" "np")
- (set_attr "athlon_decode" "vector")
- (set_attr "amdfam10_decode" "double")])
+ "rol{w}\t{$8, %0|%0, 8}"
+ [(set_attr "length" "4")
+ (set_attr "mode" "HI")])
(define_insn "bswapdi2"
[(set (match_operand:DI 0 "register_operand" "=r")
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index dd038d1..d678133 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,5 +1,12 @@
+2007-02-16 Uros Bizjak <ubizjak@gmail.com>
+
+ * gcc.target/i386/builtin-bswap-1.c: Remove -march=nocona.
+ * gcc.target/i386/builtin-bswap-3.c: Ditto.
+ * gcc.target/i386/xchg-1.c: New test.
+ * gcc.target/i386/xchg-2.c: New test.
+
2007-02-16 Richard Guenther <rguenther@suse.de>
- Christian Bruel <christian.bruel@st.com>
+ Christian Bruel <christian.bruel@st.com>
* gcc.dg/strict-overflow-5.c: New testcase.
diff --git a/gcc/testsuite/gcc.target/i386/builtin-bswap-1.c b/gcc/testsuite/gcc.target/i386/builtin-bswap-1.c
index 9926e18..0f94025 100644
--- a/gcc/testsuite/gcc.target/i386/builtin-bswap-1.c
+++ b/gcc/testsuite/gcc.target/i386/builtin-bswap-1.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-march=nocona" } */
+/* { dg-options "-O2" } */
/* { dg-final { scan-assembler-not "builtin_bswap" } } */
long foo (long a)
diff --git a/gcc/testsuite/gcc.target/i386/builtin-bswap-3.c b/gcc/testsuite/gcc.target/i386/builtin-bswap-3.c
index eaea537..d5d612f 100644
--- a/gcc/testsuite/gcc.target/i386/builtin-bswap-3.c
+++ b/gcc/testsuite/gcc.target/i386/builtin-bswap-3.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O2 -march=nocona" } */
+/* { dg-options "-O2" } */
/* { dg-final { scan-assembler-not "bswapdi2" } } */
long long foo (long long x)
diff --git a/gcc/testsuite/gcc.target/i386/xchg-1.c b/gcc/testsuite/gcc.target/i386/xchg-1.c
new file mode 100644
index 0000000..464417b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/xchg-1.c
@@ -0,0 +1,9 @@
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O2 -march=k8" } */
+
+unsigned short good(unsigned short a)
+{
+ return (a >> 8 | a << 8);
+}
+
+/* { dg-final { scan-assembler "rol" } } */
diff --git a/gcc/testsuite/gcc.target/i386/xchg-2.c b/gcc/testsuite/gcc.target/i386/xchg-2.c
new file mode 100644
index 0000000..1af4c98
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/xchg-2.c
@@ -0,0 +1,9 @@
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-Os" } */
+
+unsigned short good(unsigned short a)
+{
+ return (a >> 8 | a << 8);
+}
+
+/* { dg-final { scan-assembler "xchg" } } */