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authorVladimir Makarov <vmakarov@redhat.com>2014-04-02 20:55:02 +0000
committerVladimir Makarov <vmakarov@gcc.gnu.org>2014-04-02 20:55:02 +0000
commitf4581282e57ef0f609b21be81e641911965c3bd8 (patch)
treea7d5d954780e636400f8827190e1f3240b9c4a2f /gcc
parentab18f2f51cc15d464943663949d9872a15108b0a (diff)
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re PR rtl-optimization/60650 ([ARM] LRA ICE in assign_by_spills)
2014-04-02 Vladimir Makarov <vmakarov@redhat.com> PR rtl-optimization/60650 * lra-constraints.c (process_alt_operands): Decrease reject for earlyclobber matching. 2014-04-02 Vladimir Makarov <vmakarov@redhat.com> PR rtl-optimization/60650 * gcc.target/arm/pr60650-2.c: New. From-SVN: r209038
Diffstat (limited to 'gcc')
-rw-r--r--gcc/ChangeLog8
-rw-r--r--gcc/lra-constraints.c29
-rw-r--r--gcc/testsuite/ChangeLog5
-rw-r--r--gcc/testsuite/gcc.target/arm/pr60650-2.c37
4 files changed, 71 insertions, 8 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 11293cc..1b2f824 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2014-04-02 Vladimir Makarov <vmakarov@redhat.com>
+
+ PR rtl-optimization/60650
+ * lra-constraints.c (process_alt_operands): Decrease reject for
+ earlyclobber matching.
+
2014-04-02 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* config/s390/s390.c (s390_expand_insv): Use GET_MODE_BITSIZE.
@@ -280,7 +286,7 @@
2014-03-27 Vladimir Makarov <vmakarov@redhat.com>
PR rtl-optimization/60650
- * lra-asign.c (find_hard_regno_for, spill_for): Add parameter
+ * lra-assign.c (find_hard_regno_for, spill_for): Add parameter
first_p. Use it.
(find_spills_for): New.
(assign_by_spills): Pass the new parameter to find_hard_regno_for.
diff --git a/gcc/lra-constraints.c b/gcc/lra-constraints.c
index cfc3d7e..aac5087 100644
--- a/gcc/lra-constraints.c
+++ b/gcc/lra-constraints.c
@@ -1747,12 +1747,27 @@ process_alt_operands (int only_alternative)
[GET_MODE (*curr_id->operand_loc[m])]);
}
- /* We prefer no matching alternatives because
- it gives more freedom in RA. */
- if (operand_reg[nop] == NULL_RTX
- || (find_regno_note (curr_insn, REG_DEAD,
- REGNO (operand_reg[nop]))
- == NULL_RTX))
+ /* Prefer matching earlyclobber alternative as
+ it results in less hard regs required for
+ the insn than a non-matching earlyclobber
+ alternative. */
+ if (curr_static_id->operand[m].early_clobber)
+ {
+ if (lra_dump_file != NULL)
+ fprintf
+ (lra_dump_file,
+ " %d Matching earlyclobber alt:"
+ " reject--\n",
+ nop);
+ reject--;
+ }
+ /* Otherwise we prefer no matching
+ alternatives because it gives more freedom
+ in RA. */
+ else if (operand_reg[nop] == NULL_RTX
+ || (find_regno_note (curr_insn, REG_DEAD,
+ REGNO (operand_reg[nop]))
+ == NULL_RTX))
{
if (lra_dump_file != NULL)
fprintf
@@ -2143,7 +2158,7 @@ process_alt_operands (int only_alternative)
}
/* If the operand is dying, has a matching constraint,
and satisfies constraints of the matched operand
- which failed to satisfy the own constraints, probably
+ which failed to satisfy the own constraints, most probably
the reload for this operand will be gone. */
if (this_alternative_matches >= 0
&& !curr_alt_win[this_alternative_matches]
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 19e2cd6..2decdf1 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2014-04-02 Vladimir Makarov <vmakarov@redhat.com>
+
+ PR rtl-optimization/60650
+ * gcc.target/arm/pr60650-2.c: New.
+
2014-04-02 Joseph Myers <joseph@codesourcery.cmo>
* gcc.target/i386/avx2-vpand-3.c,
diff --git a/gcc/testsuite/gcc.target/arm/pr60650-2.c b/gcc/testsuite/gcc.target/arm/pr60650-2.c
new file mode 100644
index 0000000..1946760
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/pr60650-2.c
@@ -0,0 +1,37 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -fno-omit-frame-pointer -march=armv7-a" } */
+
+int a, h, j;
+long long d, e, i;
+int f;
+fn1 (void *p1, int p2)
+{
+ switch (p2)
+ case 8:
+{
+ register b = *(long long *) p1, c asm ("r2");
+ asm ("%0": "=r" (a), "=r" (c):"r" (b), "r" (0));
+ *(long long *) p1 = c;
+ }
+}
+
+fn2 ()
+{
+ int k;
+ k = f;
+ while (1)
+ {
+ fn1 (&i, sizeof i);
+ e = d + k;
+ switch (d)
+ case 0:
+ (
+ {
+ register l asm ("r4");
+ register m asm ("r0");
+ asm (" .err .endif\n\t": "=r" (h), "=r" (j):"r" (m),
+ "r"
+ (l));;
+ });
+ }
+}