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author | GCC Administrator <gccadmin@gcc.gnu.org> | 2023-07-23 00:17:30 +0000 |
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committer | GCC Administrator <gccadmin@gcc.gnu.org> | 2023-07-23 00:17:30 +0000 |
commit | f33fdf9e7c0386397576330db880c2ba85314a9c (patch) | |
tree | 530c9a5f0df65c5c1860062c9f5c4bf6d60b8c3c /gcc | |
parent | ecfa870ff29d979bd2c3d411643b551f2b6915b0 (diff) | |
download | gcc-f33fdf9e7c0386397576330db880c2ba85314a9c.zip gcc-f33fdf9e7c0386397576330db880c2ba85314a9c.tar.gz gcc-f33fdf9e7c0386397576330db880c2ba85314a9c.tar.bz2 |
Daily bump.
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/ChangeLog | 58 | ||||
-rw-r--r-- | gcc/DATESTAMP | 2 | ||||
-rw-r--r-- | gcc/m2/ChangeLog | 15 | ||||
-rw-r--r-- | gcc/testsuite/ChangeLog | 15 |
4 files changed, 89 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 835fec3..2eab466 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,61 @@ +2023-07-22 Vineet Gupta <vineetg@rivosinc.com> + + PR target/110748 + * config/riscv/predicates.md (const_0_operand): Add back + const_double. + +2023-07-22 Roger Sayle <roger@nextmovesoftware.com> + + * config/i386/i386-expand.cc (ix86_expand_move): Disable the + 64-bit insertions into TImode optimizations with -O0, unless + the function has the "naked" attribute (for PR target/110533). + +2023-07-22 Andrew Pinski <apinski@marvell.com> + + PR target/110778 + * rtl.h (extended_count): Change last argument type + to bool. + +2023-07-22 Roger Sayle <roger@nextmovesoftware.com> + + * config/i386/i386.md (extv<mode>): Use QImode for offsets. + (extzv<mode>): Likewise. + (insv<mode>): Likewise. + (*testqi_ext_3): Likewise. + (*btr<mode>_2): Likewise. + (define_split): Likewise. + (*btsq_imm): Likewise. + (*btrq_imm): Likewise. + (*btcq_imm): Likewise. + (define_peephole2 x3): Likewise. + (*bt<mode>): Likewise + (*bt<mode>_mask): New define_insn_and_split. + (*jcc_bt<mode>): Use QImode for offsets. + (*jcc_bt<mode>_1): Delete obsolete pattern. + (*jcc_bt<mode>_mask): Use QImode offsets. + (*jcc_bt<mode>_mask_1): Likewise. + (define_split): Likewise. + (*bt<mode>_setcqi): Likewise. + (*bt<mode>_setncqi): Likewise. + (*bt<mode>_setnc<mode>): Likewise. + (*bt<mode>_setncqi_2): Likewise. + (*bt<mode>_setc<mode>_mask): New define_insn_and_split. + (bmi2_bzhi_<mode>3): Use QImode offsets. + (*bmi2_bzhi_<mode>3): Likewise. + (*bmi2_bzhi_<mode>3_1): Likewise. + (*bmi2_bzhi_<mode>3_1_ccz): Likewise. + (@tbm_bextri_<mode>): Likewise. + +2023-07-22 Jeff Law <jlaw@ventanamicro.com> + + * config/bfin/bfin.md (ones): Fix length computation. + +2023-07-22 Vladimir N. Makarov <vmakarov@redhat.com> + + * lra-eliminations.cc (update_reg_eliminate): Fix the assert. + (lra_update_fp2sp_elimination): Use HARD_FRAME_POINTER_REGNUM + instead of FRAME_POINTER_REGNUM to spill pseudos. + 2023-07-21 Roger Sayle <roger@nextmovesoftware.com> Richard Biener <rguenther@suse.de> diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP index 05e1afb..15985d1 100644 --- a/gcc/DATESTAMP +++ b/gcc/DATESTAMP @@ -1 +1 @@ -20230722 +20230723 diff --git a/gcc/m2/ChangeLog b/gcc/m2/ChangeLog index 5197a00..519353a 100644 --- a/gcc/m2/ChangeLog +++ b/gcc/m2/ChangeLog @@ -1,3 +1,18 @@ +2023-07-22 Gaius Mulley <gaiusmod2@gmail.com> + + PR modula2/110631 + * gm2-libs/FIO.def (ReadAny): Correct comment as + HIGH (a) + 1 is number of bytes. + (WriteAny): Correct comment as HIGH (a) + 1 is number of + bytes. + * gm2-libs/FIO.mod (ReadAny): Correct comment as + HIGH (a) + 1 is number of bytes. Also pass HIGH (a) + 1 + to BufferedRead. + (WriteAny): Correct comment as HIGH (a) + 1 is number of + bytes. Also pass HIGH (a) + 1 to BufferedWrite. + (BufferedWrite): Rename parameter a to src, rename variable + t to dest. Correct parameter order to memcpy. + 2023-07-20 Gaius Mulley <gaiusmod2@gmail.com> * gm2-compiler/M2SymInit.mod (IsExempt): Remove parameter exemption. diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 3a9d390..b11b463 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,18 @@ +2023-07-22 Vineet Gupta <vineetg@rivosinc.com> + + * gcc.target/riscv/pr110748-1.c: New Test. + * gcc.target/riscv/xtheadfmv-fmv.c: Add '\t' around test + patterns to avoid random string matches. + +2023-07-22 Maciej W. Rozycki <macro@embecosm.com> + + * gcc.dg/vect/bb-slp-pr95839-v8.c: Limit to `vect64' targets. + +2023-07-22 Gaius Mulley <gaiusmod2@gmail.com> + + PR modula2/110631 + * gm2/pimlib/run/pass/testfiobinary.mod: New test. + 2023-07-21 John David Anglin <danglin@gcc.gnu.org> * gcc.c-torture/compile/asmgoto-6.c: Require target lra. |